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DM9006 Datasheet(PDF) 44 Page - Davicom Semiconductor, Inc.

Part No. DM9006
Description  10/100 Mbps 2-port Ethernet Switch Controller with General Processor Interface
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Maker  DAVICOM [Davicom Semiconductor, Inc.]
Homepage  http://www.davicom.com.tw
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DM9006 Datasheet(HTML) 44 Page - Davicom Semiconductor, Inc.

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DM9006
2-port Switch with Processor Interface
44
Preliminary datasheet
DM9006-13-DS-P01
September 1, 2009
8.1 Basic Mode Control Register (BMCR) – 00H
Bit
Bit Name
Default
Description
15
Reset
0, RW/SC Reset
1=Software reset
0=Normal operation
This bit sets the status and controls the PHY registers to their
default states. This bit, which is self-clearing, will keep returning a
value of one until the reset process is completed
14
Loopback
0, RW
Loopback
Loop-back control register
1 = Loop-back enabled
0 = Normal operation
When in 100Mbps operation mode, setting this bit may cause the
descrambler to lose synchronization and produce a 720ms "dead
time" before any valid data appears at the MII receive outputs
13
Speed selection
1, RW
Speed Select
1 = 100Mbps
0 = 10Mbps
Link speed may be selected either by this bit or by auto-negotiation.
When auto-negotiation is enabled and bit 12 is set, this bit will return
auto-negotiation selected medium type
12
Auto-negotiation
enable
1, RW
Auto-negotiation Enable
1 = Auto-negotiation is enabled, bit 8 and 13 will be in
auto-negotiation status
11
Power down
0, RW
Power Down
While in the power-down state, the PHY should respond to
management transactions. During the transition to power-down
state and while in the power-down state, the PHY should not
generate spurious signals on the MII
1=Power down
0=Normal operation
10
Isolate
0,RW
Isolate
Force to 0 in application.
9
Restart
Auto-negotiation
0,RW/SC Restart Auto-negotiation
1 = Restart auto-negotiation. Re-initiates the auto-negotiation
process. When auto-negotiation is disabled (bit 12 of this register
cleared), this bit has no function and it should be cleared. This bit is
self-clearing and it will keep returning to a value of 1 until
auto-negotiation is initiated by the DM9006. The operation of the
auto-negotiation process will not be affected by the management
entity that clears this bit
0 = Normal operation
8
Duplex mode
1,RW
Duplex Mode
1 = Full duplex operation. Duplex selection is allowed when
Auto-negotiation is disabled (bit 12 of this register is cleared). With
auto-negotiation enabled, this bit reflects the duplex capability
selected by auto-negotiation
0 = Normal operation


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