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DS1308U-3+ Datasheet(PDF) 4 Page - Maxim Integrated Products |
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DS1308U-3+ Datasheet(HTML) 4 Page - Maxim Integrated Products |
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4 / 16 page  ����������������������������������������������������������������� Maxim Integrated Products 4 DS1308 Low-Current I2C RTC with 56-Byte NV RAM POWER-UP/DOWN CHARACTERISTICS (TA = -40NC to +85NC, unless otherwise noted.) (Notes 2, 16) CAPACITANCE (TA = +25NC, unless otherwise noted.) (Note 16) Warning: Negative undershoots below -0.3V while the part is in battery-backed mode may cause loss of data. Note 2: Limits are 100% production tested at TA = +25NC and TA = +85NC. Limits over the operating temperature range and relevant supply voltage are guaranteed by design and characterization. Typical values are not guaranteed. Note 3: SCL clocking at max frequency. VSCL = 0V to VCC. Note 4: Specified with I2C bus inactive. Timekeeping and square-wave functions operational. Note 5: CH = ECLK = SQWE = 0. Note 6: CH = ECLK = 0, SQWE = RS1 = RS0 = 1, IOUT = 0mA. Note 7: CH = 1. ECLK = SQWE = 0. Note 8: The minimum SCL clock frequency is limited by the bus timeout feature, which resets the serial bus interface if SCL is held low for tTIMEOUT. Note 9: After this period, the first clock pulse is generated. Note 10: A device must internally provide a hold time of at least 300ns for the SDA signal (referenced to the VIHMIN of the SCL signal) to bridge the undefined region of the falling edge of SCL. Note 11: The maximum tHD:DAT has only to be met if the device does not stretch the low period (tLOW) of the SCL signal. Note 12: A fast-mode device can be used in a standard-mode system, but the requirement tSU:DAT R to 250ns must then be met. This is automatically the case if the device does not stretch the low period of the SCL signal. If such a device does stretch the low period of the SCL signal, it must output the next data bit to the SDA line tRMAX + tSU:DAT = 1000 + 250 = 1250ns before the SCL line is released. Note 13: CB is the total capacitance of one bus line, including all connected devices, in pF. Note 14: The parameter tOSF is the period of time the oscillator must be stopped for the OSF flag to be set over the voltage range of 2.4V P VCC P VCCMAX. Note 15: The DS1308 can detect any single SCL clock held low longer than tTIMEOUTMIN. The device’s I2C interface is in reset state and can receive a new START condition when SCL is held low for at least tTIMEOUTMAX. Once the part detects this condition the SDA output is released. The oscillator must be running for this function to work. Note 16: Guaranteed by design and not 100% production tested. PARAMETER SYMBOL MIN TYP MAX UNITS Recovery at Power-Up tREC 1 2 ms VCC Slew Rate (VPF to 0V) tVCCF 1/50 V/Fs VCC Slew Rate (0V to VPF) tVCCR 1/1 V/Fs PARAMETER SYMBOL MIN TYP MAX UNITS Input Capacitance CI 10 pF I/O Capacitance CO 10 pF |
Similar Part No. - DS1308U-3+ |
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