SDE 2526

Semiconductor Group

84

Memory Reprogramming

The reprogramming cycle of a memory word comprises an erase and a subsequent write process.

During erase, all eight bits of the selected word are set into the "1" state. During write, "0" states are

generated according to the information in the internal data register, i.e. according to the third input

control word. After the 27th and last clock of the control word input, the active programming process

is started by the stop condition. The active reprogramming process is executed under on-chip

control.

The time required for reprogramming depends on component deviation and data patterns.

Therefore, with rated supply voltage, the erase/write process extends over max. 20 ms, or more

typically, 10 ms. In the case of data word input without write request (write request is defined as data

bit in data register set to "0"), the write process is suppressed and the programming time is

shortened. During a subsequent programming of an already erased memory address, the erase

process is suppressed again, so that the reprogramming time is also shortened.

Important: Switch-On Mode and Chip Reset

After the supply voltage

As a rule, the first operating mode to be entered, should be the read process of a word address.

As a result of the built-in "power-on reset" circuit, programming requests will not be accepted

immediately after the supply voltage has been switched on.

Total Erase

Enter the control word CS/E, load the address register with address 0 and the data register with FF

(hex) to erase the entire contents of the memory. Switch input CS2 to "open" immediately prior to

generating the stop condition. The subsequent stop condition triggers a total erase. Upon

termination of "total erase", CS2 must be reconnected to either 0 V or

≥ 4.5 V.