Data Sheet

ADV7850

Rev. 0 | Page 5 of 32

SPECIFICATIONS

AVDD = 1.8 V ± 5%, VDD to GND = 1.8 V ± 5%, PVDD = 1.8 V ± 5%, TX_AVDD = 1.8 V ± 5%, TX_PVDD = 1.8 V ± 5%, SAVDD =

1.8 V ± 5%, SDVDD = 1.8 V ± 5%, CVDD = 1.8 V ± 5%, DVDDIO = 3.3 V ± 5%, TX_VDD33 = 3.3 V ± 5%, TVDD = 3.3 V ± 5%,

ELECTRICAL CHARACTERISTICS

Table 1.

Parameter

Symbol

Test Conditions/Comments

Min

Typ

Max

Unit

STATIC PERFORMANCE

Resolution (Each ADC)

N

12

Bits

Integral Nonlinearity

INL

27 MHz (at a 12-bit level)

−3.0 to +8.0

LSB

54 MHz (at a 12-bit level)

−3.0 to +8.0

LSB

74.25 MHz (at a 12-bit level)

−4.0 to +7.0

LSB

108 MHz (at a 11-bit level)

−3.5 to +8.0

LSB

170 MHz (at a 9-bit level)

−0.7 to +1.8

LSB

Differential Nonlinearity

DNL

27 MHz (at a 12-bit level)

−0.7 to +0.8

LSB

54 MHz (at a 12-bit level)

−0.7 to +0.8

LSB

75 MHz (at a 12-bit level)

−0.7 to +0.8

LSB

108 MHz (at a 11-bit level)

−0.7 to +0.8

LSB

170 MHz (at a 9-bit level)

−0.6 to +0.5

LSB

DIGITAL INPUTS

Input High Voltage

V

IH

XTALN and XTALP pins

1.2

V

Input Low Voltage

V

IL

XTALN and XTALP pins

0.4

V

V

IH

Other digital inputs

2

V

V

IL

Other digital inputs

0.8

V

Input Capacitance

C

IN

10

pF

HDMI

TMDS Differential Pin Capacitance

0.3

pF

DIGITAL INPUTS (5 V TOLERANT)1

Input High Voltage

V

IH

3.0

V

Input Low Voltage

V

IL

0.8

V

Input Current

I

IN

−82

+82

µA

DIGITAL OUTPUTS

Output High Voltage

V

OH

2.4

V

Output Low Voltage

V

OL

0.4

V

High Impedance Leakage Current

I

LEAK

DDC_SCL, DDCA_SDA, DDCB_SCL,

DDCB_SDA, DDCC_SCL,

DDCC_SDA, DDCD_SCL,

DDCD_SDA, VGA_SCL, VGA_SDA,

SPDIF_IN, SHARED_EDID

30

µA

I

LEAK

RXA_5V, RXB_5V, RXC_5V, RXD_5V

and VGA_5V

20

µA

I

LEAK

All other digital pins

10

µA

Output Capacitance

C

OUT

20

pF

DDCD_SCL, DDCD_SDA, VGA_SCL, VGA_SDA, TX_DDC_SCL, TX_DDC_SDA, RXA_5V, RXB_5V, RXC_5V, RXD_5V, and VGA_5V.