Electronic Components Datasheet Search |
|
ADP5061 Datasheet(PDF) 5 Page - Analog Devices |
|
ADP5061 Datasheet(HTML) 5 Page - Analog Devices |
5 / 44 page Data Sheet ADP5061 Rev. 0 | Page 5 of 44 Parameter Symbol Min Typ Max Unit Test Conditions/Comments JEITA2 Li-ION BATTERY CHARGING SPECIFICATION DEFAULTS5 JEITA Cold Temperature TJEITA_COLD 0 °C No battery charging occurs Resistance Thresholds Cool to Cold Resistance RCOLD_FALL 20,500 25,600 30,720 Ω Cold to Cool Resistance RCOLD_RISE 24,400 Ω JEITA Cool Temperature TJEITA_COOL 10 °C Battery termination voltage (VTRM) is reduced by 100 mV Resistance Thresholds Typical to Cool Resistance RTYP_FALL 13,200 16,500 19,800 Ω Cool to Typical Resistance RTYP_RISE 15,900 Ω JEITA Typical Temperature TJEITA_TYP °C Normal battery charging occurs at default/programmed levels Resistance Thresholds Warm to Typical Resistance RWARM_FALL 5800 Ω Typical to Warm Resistance RWARM_RISE 4260 5200 6140 Ω JEITA Warm Temperature TJEITA_WARM 45 °C Battery termination voltage (VTRM) is reduced by 100 mV Resistance Thresholds Hot to Warm Resistance RHOT_FALL 3700 Ω Warm to Hot Resistance RHOT_RISE 2750 3350 3950 Ω JEITA Hot Temperature TJEITA_HOT 60 °C No battery charging occurs BATTERY DETECTION Battery Detection Sink Current ISINK 13 20 34 mA Source Current ISOURCE 7 10 13 mA Battery Threshold Low VBATL 1.8 1.9 2.0 V High VBATH 3.4 V Battery Detection Timer tBATOK 333 ms TIMERS Clock Oscillator Frequency fCLK 2.7 3 3.3 MHz Start Charging Delay tSTART 1 sec Trickle Charge tTRK 60 min Fast Charge tCHG 600 min Charge Complete tEND 7.5 min VBAT_SNS = VTRM, ICHG < IEND Deglitch tDG 31 ms Applies to VTRK, VRCH, IEND, VDEAD, VVIN_OK Watchdog2 tWD 32 sec Safety tSAFE 36 40 44 min Battery Short2 tBAT_SHR 30 sec ILED OUTPUT PINS Voltage Drop over ILED VILED 200 mV IILED = 20 mA Maximum Operating Voltage over ILED VMAXILED 5.5 V SYS_EN OUTPUT PIN SYS_EN FET On Resistance RON_SYS_EN 10 Ω ISYS_EN = 20 mA LOGIC INPUT PIN Maximum Voltage on Digital Inputs VDIN_MAX 5.5 V Applies to SCL, SDA, DIG_IO1, DIG_IO2, DIG_IO3 Maximum Logic Low Input Voltage VIL 0.5 V Applies to SCL, SDA, DIG_IO1, DIG_IO2, DIG_IO3 Minimum Logic High Input Voltage VIH 1.2 V Applies to SCL, SDA, DIG_IO1, DIG_IO2, DIG_IO3 Pull-Down Resistance 215 350 610 kΩ Applies to DIG_IO1, DIG_IO2, DIG_IO3 1 Undervoltage lockout generated normally from ISO_Sx or ISO_Bx; in certain transition cases, it can be generated from VINx. 2 These values are programmable via I2C. Values are given with default register values. 3 The output current during charging may be limited by the input current limit or by the isothermal charging mode. 4 During weak charging mode, the charger provides at least 20 mA of charging current via the trickle charge branch to the battery unless trickle charging is disabled. Any residual current, which is not required by the system, is also used to charge the battery. 5 Either JEITA1 (default) or JEITA2 can be selected in I2C, or both JEITA functions can enabled or disabled in I2C. |
Similar Part No. - ADP5061 |
|
Similar Description - ADP5061 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |