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ADN4691EBRZ-RL7 Datasheet(PDF) 3 Page - Analog Devices |
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ADN4691EBRZ-RL7 Datasheet(HTML) 3 Page - Analog Devices |
3 / 20 page Data Sheet ADN4691E/ADN4693E/ADN4696E/ADN4697E Rev. A | Page 3 of 20 SPECIFICATIONS VCC = 3.0 V to 3.6 V; RL = 50 Ω; TA = TMIN to TMAX, unless otherwise noted. 1 Table 2. Parameter Symbol Min Typ Max Unit Test Conditions/Comments DRIVER Differential Outputs Differential Output Voltage Magnitude |VOD| 480 650 mV See Figure 19 ∆|VOD| for Complementary Output States ∆|VOD| −50 +50 mV See Figure 19 Common-Mode Output Voltage (Steady State) VOC(SS) 0.8 1.2 V See Figure 20, Figure 23 ΔVOC(SS) for Complementary Output States ΔVOC(SS) −50 +50 mV See Figure 20, Figure 23 Peak-to-Peak VOC VOC(PP) 150 mV See Figure 20, Figure 23 Maximum Steady-State Open-Circuit Output Voltage VA(O), VB(O), VY(O), or VZ(O) 0 2.4 V See Figure 21 Voltage Overshoot Low to High VPH 1.2VSS V See Figure 24, Figure 27 High to Low VPL −0.2VSS V See Figure 24, Figure 27 Output Current Short Circuit |IOS| 24 mA See Figure 22 High Impedance State, Driver Only IOZ −15 +10 μA –1.4 V ≤ (VY or VZ) ≤ 3.8 V, other output = 1.2 V Power Off IO(OFF) −10 +10 μA –1.4 V ≤ (VY or VZ) ≤ 3.8 V, other output = 1.2 V, 0 V ≤ VCC ≤ 1.5 V Output Capacitance CY or CZ 3 pF VI = 0.4 sin(30e6πt) V + 0.5 V,2 other output = 1.2 V, DE = 0 V Differential Output Capacitance CYZ 2.5 pF VAB = 0.4 sin(30e6πt) V,2 DE = 0 V Output Capacitance Balance (CY/CZ) CY/Z 0.99 1.01 Logic Inputs (DI, DE) Input High Voltage VIH 2 VCC V Input Low Voltage VIL GND 0.8 V Input High Current IIH 0 10 μA VIH = 2 V Input Low Current IIL 0 10 μA VIL = 0.8 V RECEIVER Differential Inputs Differential Input Threshold Voltage Type 1 Receiver (ADN4691E, ADN4693E) VTH −50 +50 mV See Table 3, Figure 36 Type 2 Receiver (ADN4696E, ADN4697E) VTH 50 150 mV See Table 4, Figure 36 Input Hysteresis Type 1 Receiver (ADN4691E, ADN4693E) VHYS 25 mV Type 2 Receiver (ADN4696E, ADN4697E) VHYS 0 mV Differential Input Voltage Magnitude |VID| 0.05 VCC V Input Capacitance CA or CB 3 pF VI = 0.4 sin(30e6πt) V + 0.5 V,2 other input = 1.2 V Differential Input Capacitance CAB 2.5 pF VAB = 0.4 sin(30e6πt) V2 Input Capacitance Balance (CA/CB) CA/B 0.99 1.01 Logic Output RO Output High Voltage VOH 2.4 V IOH = –8 mA Output Low Voltage VOL 0.4 V IOL = 8 mA High Impedance Output Current IOZ −10 +15 μA VO = 0 V or 3.6 V Logic Input RE Input High Voltage VIH 2 VCC V Input Low Voltage VIL GND 0.8 V Input High Current IIH −10 0 μA VIH = 2 V Input Low Current IIL −10 0 μA VIL = 0.8 V |
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