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HYS64-72V2200GU-8 Datasheet(PDF) 12 Page - Siemens Semiconductor Group |
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HYS64-72V2200GU-8 Datasheet(HTML) 12 Page - Siemens Semiconductor Group |
12 / 17 page HYS64(72)V2200/4220GU-8/-10 SDRAM-Modules Semiconductor Group 12 SPD-Table (cont’d): Byte# Description SPD Entry Value Hex 2Mx64 -8 2Mx72 -8 4Mx64 -8 4Mx72 -8 29 Minimum RAS to CAS delay tRCD 20 ns 14 14 14 14 30 Minimum RAS pulse width tRAS 45 ns 2D 2D 2D 2D 31 Module Bank Density (per bank) 16 MByte 04 04 04 04 32 SDRAM input setup time 2 ns 20 20 20 20 33 SDRAM input hold time 1 ns 10 10 10 10 34 SDRAM data input setup time 2 ns 20 20 20 20 35 SDRAM data input hold time 1 ns 10 10 10 10 36-61 Superset information (may be used in future) FF FF FF FF 62 SPD Revision Revision 1.2 12 12 12 12 63 Checksum for bytes 0 - 62 C9 DB CA DC 64- 125 Manufacturers information (optional) (FFh if not used) XX XX XX XX 126 Frequency Specification 100 MHz 64 64 64 64 127 Details of 100 MHz Support AF AF FF FF 128+ Unused storage locations FF FF FF FF |
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