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HYM64V1005GU-5 Datasheet(PDF) 2 Page - Siemens Semiconductor Group

Part No. HYM64V1005GU-5
Description  3.3V 1M x 64-Bit EDO-DRAM Module 3.3V 1M x 72-Bit EDO-DRAM Module
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Maker  SIEMENS [Siemens Semiconductor Group]
Homepage  http://www.siemens.com/
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HYM64V1005GU-5 Datasheet(HTML) 2 Page - Siemens Semiconductor Group

 
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HYM 64(72)V1005GU-50/-60
1M x 64/72 DRAM Module
Semiconductor Group
2
The HYM64(72)V1005GU-50/-60 are industry standard 168-pin 8-byte Dual In-Line Memory
Module (DIMMs) which are organized as 1M x 64 and 1M x 72 high speed memory arrays designed
with EDO DRAMs for non-parity and ECC applications. The DIMMs use four 1M x 16 EDO DRAMs
for the 1M x 64 organisation and additional two 1M x 4 DRAMs for the 1M x 72 organisation.
Decoupling capacitors are mounted on the PC board.
The DIMMs use optional serial presence detects implemented via a serial E 2PROM using the two
pin I2C protocol. The first 128 bytes are utilized by the DIMM manufacturer and the second 128
bytes of serial PD data are available to the customer.
All 168-pin DIMMs provide a high performance, flexible 8-byte interface in a 133,35 mm long space-
saving footprint.
Ordering Information
Pin Names
Type
Ordering
Code
Package
Descriptions
HYM 64V1005GU-50
Q67100-Q2176
L-DIM-168-10
1M x 64 DRAM module (access time 50 ns)
HYM 64V1005GU-60
Q67100-Q2177
L-DIM-168-10
1M x 64 DRAM module (access time 60 ns)
HYM 72V1005GU-50
Q67100-Q2178
L-DIM-168-10
1M x 72 DRAM module (access time 50 ns)
HYM 72V1005GU-60
Q67100-Q2179
L-DIM-168-10
1M x 72 DRAM module (access time 60 ns)
A0-A9
Address Input
DQ0 - DQ63
Data Input/Output
CB0-CB7
Check Bit Data Input/Output ( x72 only)
RAS0, RAS2
Row Address Strobe
CAS0 - CAS7
Column Address Strobe
WE0, WE2
Read / Write Input
OE0, OE2
Output Enable
Vcc
Power (+3.3 Volt)
Vss
Ground
SCL
Clock for Presence Detect
SDA
Serial Data Out for Presence Detect
SA0-SA2
Serial Presence Detect Addresses
N.C.
No Connection
DU
Don’t use


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