HYM361120S-70 datasheet(9/9 Pages) SIEMENS

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HYM361120S-70 Datasheet(PDF) 9 Page - Siemens Semiconductor Group

Part #	HYM361120S-70

Description	1M x 36-Bit Dynamic RAM Module (2M x 18-Bit Dynamic RAM Module)

Download	9 Pages

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Manufacturer	SIEMENS [Siemens Semiconductor Group]

Direct Link	http://www.siemens.com/

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9 / 9 page

Semiconductor Group

599

Notes

1) All voltages are referenced to VSS .

2) ICC1, ICC3, ICC4 and ICC6 depend on cycle rate.

3) ICC1 and ICC4 depend on output loading. Specified values are measured with the output open.

4) An initial pause of 200

µs is required after power-up followed by 8 RAS cycles out of which at least one cycle

has to be a refresh cycle before proper device operation is achieved. In case of using internal refresh counter,

a minimum of 8 CAS-before-RAS initialization cycles instead of 8 RAS cycles are required.

5) VIH (min.) and VIL (max.) are reference levels for measuring timing of input signals. Transition times are also

measured between VIH and VIL .

6) Measured with a load equivalant of 2 TTL loads and 100 pF.

7) tOFF (max.) defines the time at which the output achieves the open-circuit condition and is not referenced to

output voltage levels.

8) Either tRCH or tRRH must be satisfied for a read cycle.

9) These parameters are referenced to the CAS leading edge.

10) tWCS is not a restrictive operating parameter. This is included in the data sheet as electrical characteristic only.

If tWCS > tWCS (min.), the cycle is an early write cycle and data out pin will remain open circuit (high impedance).

11) Operation within the tRCD (max.) limit insures that tRAC (max.) can be met. tRCD (max.) is specified as a reference

point only. If tRCD is greater than the specified tRCD (max.) limit, then access time is controlled by tCAC.

12) Operation within the tRAD (max.) limit insures that tRAC (max.) can be met. tRAD (max.) is specified as a reference

point only. If tRAD is greater than the specified tRAD (max.) limit, then access time is controlled by tAA.

13) For CAS-before-RAS cycles only.

HYM 361120/40S/GS-60/-70

× 36-Bit

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