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HYB514100BJ-50- Datasheet(PDF) 1 Page - Siemens Semiconductor Group |
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HYB514100BJ-50- Datasheet(HTML) 1 Page - Siemens Semiconductor Group |
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Semiconductor Group 1 1998-10-01 4M × 1-Bit Dynamic RAM Advanced Information • 4 194 304 words by 1-bit organization • 0 to 70 °C operating temperature • Fast Page Mode Operation • Performance: • Single + 5 V ( ± 10 %) supply with a built-in V BB generator • Low power dissipation max. 660 mW active (-50 version) max. 605 mW active (-60 version) • Standby power dissipation: 11 mW max. standby (TTL) 5.5 mW max. standby (CMOS) • Output unlatched at cycle end allows two-dimensional chip selection • Read, write, read-modify write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh and test mode capability • All inputs and outputs TTL-compatible • 1024 refresh cycles/16 ms • Plastic Packages: P-SOJ-26/20-2 with 300 mil width -50 -60 t RAC RAS access time 50 60 ns t CAC CAS access time 13 15 ns t AA Access time from address 25 30 ns t RC Read/Write cycle time 95 110 ns t PC Fast page mode cycle time 35 40 ns HYB 514100BJ-50/-60 |
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