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CLRC663 Datasheet(PDF) 12 Page - NXP Semiconductors

Part No. CLRC663
Description  Contactless reader IC
Download  132 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

CLRC663 Datasheet(HTML) 12 Page - NXP Semiconductors

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CLRC663
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.3 — 3 April 2012
171133
12 of 132
NXP Semiconductors
CLRC663
Contactless reader IC
The CLRC663 connection to a host is required to manage the complete
ISO/IEC 14443 A/MIFARE protocol. Figure 6 shows the data coding and framing
according to ISO/IEC 14443A /MIFARE.
The internal CRC coprocessor calculates the CRC value based on ISO/IEC 14443 A
part 3 and handles parity generation internally according to the transfer speed.
Table 5.
Communication overview for ISO/IEC 14443 A/MIFARE reader/writer
Communication
direction
Signal type
Transfer speed
106 kbit/s
212 kbit/s
424 kbit/s
848 kbit/s
Reader to card (send
data from the CLRC663
to a card)
fc = 13.56 MHz
reader side
modulation
100 % ASK
ASK
ASK
ASK
bit encoding
modified Miller
encoding
modified Miller
encoding
modified Miller
encoding
modified Miller
encoding
bit rate [kbit/s]
fc / 128
fc / 64
fc / 32
fc / 16
Card to reader
(CLRC663 receives
data from a card)
card side
modulation
subcarrier load
modulation
subcarrier load
modulation
subcarrier load
modulation
subcarrier load
modulation
subcarrier
frequency
fc / 16fc / 16fc / 16fc / 16
bit encoding
Manchester
encoding
BPSK
BPSK
BPSK
Fig 6.
Data coding and framing according to ISO/IEC 14443 A
001aak585
ISO/IEC 14443 A framing at 106 kBd
8-bit data
8-bit data
8-bit data
odd
parity
odd
parity
start
odd
parity
start bit is 1
ISO/IEC 14443 A framing at 212 kBd, 424 kBd and 848 kBd
8-bit data
8-bit data
8-bit data
odd
parity
odd
parity
start
even
parity
start bit is 0
burst of 32
subcarrier clocks
even parity at the
end of the frame


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