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CLRC663 Datasheet(PDF) 96 Page - NXP Semiconductors |
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CLRC663 Datasheet(HTML) 96 Page - NXP Semiconductors |
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96 / 132 page  CLRC663 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.3 — 3 April 2012 171133 96 of 132 NXP Semiconductors CLRC663 Contactless reader IC 9.13 Clock configuration 9.13.1 SerialSpeed This register allows to set speed of the RS232 interface. The default speed is set to 9,6kbit/s. The transmission speed of the interface can be changed by modifying the entries for BR_T0 and BR_T1. The transfer speed can be calculated by using the following formulas: BR_T0 = 0: transfer speed = 27.12 MHz / (BR_T1 + 1) BR_T0 > 0: transfer speed = 27.12 MHz / (BR_T1 + 33) / 2^(BR_T0 1) The framing is implemented with 1 startbit, 8 databits and 1 stop bit. A parity bit is not used. Transfer speeds above 1228,8 kbit/s are not supported. Table 164. RxAna bits Bit Symbol Description 7, 6 VMid_r_setl Factory trim value, needs to be 0 5, 4 RFU 3, 2 rcv_hpcf The rcv_hpcf [1:0] signals allow 4 different settings of the base band amplifier lower cut-off frequency from ~40 kHz to ~300 kHz. 1 to 0 rcv_gain With rcv_gain[1:0] four different gain settings from 30 dB and 60 dB can be configured (differential output voltage/differential input voltage) Table 165. Effect of gain and highpass corner register settings rcv_gain (Hex.) rcv_hpcf (Hex.) fl (kHz) fU (MHz) gain (dB20) bandwith (MHz) 03 00 38 2,3 60 2,3 03 01 79 2,4 59 2,3 03 02 150 2,6 58 2,5 03 03 264 2,9 55 2,6 02 00 41 2,3 51 2,3 02 01 83 2,4 50 2,3 02 02 157 2,6 49 2,4 02 03 272 3,0 41 2,7 01 00 42 2,6 43 2,6 01 01 84 2,7 42 2,6 01 02 157 2,9 41 2,7 01 03 273 3,3 39 3,0 00 00 43 2,6 35 2,6 00 01 85 2,7 34 2,6 00 02 159 2,9 33 2,7 00 03 276 3,4 30 3,1 |
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