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CLRC663 Datasheet(PDF) 70 Page - NXP Semiconductors |
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CLRC663 Datasheet(HTML) 70 Page - NXP Semiconductors |
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70 / 132 page  CLRC663 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.3 — 3 April 2012 171133 70 of 132 NXP Semiconductors CLRC663 Contactless reader IC 9.6.2 Status Status register. Table 68. Error bits Bit Symbol Description 7 EE_Err An error appeared during the last EEPROM command. For details see the descriptions of the EEPROM commands 6 FIFOWrErr Data was written into the FIFO, during a transmission of a possible CRC, during "RxWait", "Wait for data" or "Receiving" state, or during an authentication command. The Flag is cleared when a new CL command is started. If RxMultiple is active, the flag is cleared after the error flags have been written to the FIFO. 5 FIFOOvl Data is written into the FIFO when it is already full. The data that is already in the FIFO will remain untouched. All data that is written to the FIFO after this Flag is set to 1 will be ignored. 4Min FrameErr A valid SOF was received, but afterwards less then 4 bits of data were received. Note: Frames with less than 4 bits of data are automatically discarded and the RxDecoder stays enabled. Furthermore no RxIrq is set. The same is valid for less than 3 Bytes if the EMD suppression is activated Note: MinFrameErr is automatically cleared at the start of a receive or transceive command. In case of a transceive command, it is cleared at the start of the receiving phase ("Wait for data" state) 3 NoDataErr Data should be sent, but no data is in FIFO 2 CollDet A collision has occurred. The position of the first collision is shown in the register RxColl. Note: CollDet is automatically cleared at the start of a receive or transceive command. In case of a transceive command, it is cleared at the start of the receiving phase (“Wait for data” state). Note: If a collision is part of the defined EOF symbol, CollDet is not set to 1. 1 ProtErr A protocol error has occurred. A protocol error can be a wrong stop bit, a missing or wrong ISO/IEC14443B EOF or SOF or a wrong number of received data bytes. When a protocol error is detected, data reception is stopped. Note: ProtErr is automatically cleared at start of a receive or transceive command. In case of a transceive command, it is cleared at the start of the receiving phase (“Wait for data” state). Note: When a protocol error occurs the last received data byte is not written into the FIFO. 0 IntegErr A data integrity error has been detected. Possible cause can be a wrong parity or a wrong CRC. In case of a data integrity error the reception is continued. Note: IntegErr is automatically cleared at start of a Receive or Transceive command. In case of a Transceive command, it is cleared at the start of the receiving phase (“Wait for data” state). Note: If the NoColl bit is set, also a collision is setting the IntegErr. |
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