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CLRC663 Datasheet(PDF) 68 Page - NXP Semiconductors

Part No. CLRC663
Description  Contactless reader IC
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Maker  NXP [NXP Semiconductors]
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CLRC663 Datasheet(HTML) 68 Page - NXP Semiconductors

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CLRC663
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.3 — 3 April 2012
171133
68 of 132
NXP Semiconductors
CLRC663
Contactless reader IC
9.5.3 IRQ0En register
Interrupt request enable register for IRQ0. This register allows to define if an interrupt
request is processed by the CLRC663.
9.5.4 IRQ1En
Interrupt request enable register for IRQ1.
Table 62.
IRQ1 bits
Bit
Symbol
Description
7
Set
1: writing a 1 to a bit position 5..0 sets the interrupt request
0: Writing a 1 to a bit position 5..0 clears the interrupt request
6
GlobalIrq
Set, if an enabled Irq occurs.
5
LPCD_Irq
Set if a card is detected in Low-power card detection sequence.
4
Timer4Irq
Set to logic 1 when Timer4 has an underflow.
3
Timer3Irq
Set to logic 1 when Timer3 has an underflow.
2
Timer2Irq
Set to logic 1 when Timer2 has an underflow.
1
Timer1Irq
Set to logic 1 when Timer1 has an underflow.
0
Timer0Irq
Set to logic 1 when Timer0 has an underflow.
Table 63.
IRQ0En register (address 08h)
Bit
7
6
5
4
3
2
1
0
Symbol
Irq_Inv
Hi AlertIrqEn
LoAlertIrqEn
IdleIrqEn
TxIrqEn
RxIrqEn
ErrIrqEn
RxSOFIrqEn
Access
rights
r/w
r/w
r/w
r/w
r/w
r/w
r/w
r/w
Table 64.
IRQ0En bits
Bit
Symbol
Description
7
Irq_Inv
Set to one the signal of the IRQ pin is inverted
6
Hi AlerIrqEn
Set to logic 1, it allows the High Alert interrupt Request (indicated by the
bit HiAlertIrq) to be propagated to the GlobalIrq
5
Lo AlertIrqEn
Set to logic 1, it allows the Low Altert Interrupt Request (indicated by the
bit LoAlertIrq) to be propagated to the GlobalIrq
4
IdleIrqEn
Set to logic 1, it allows the Idle interrupt request (indicated by the bit
IdleIrq) to be propagated to the GlobalIrq
3
TxIRqEn
Set to logic 1, it allows the transmitter interrupt request (indicated by the
bit TxtIrq) to be propagated to the GlobalIrq
2
RxIRqEn
Set to logic 1, it allows the receiver interrupt request (indicated by the bit
RxIrq) to be propagated to the GlobalIrq
1
ErrIRqEn
Set to logic 1, it allows the Error interrupt request (indicated by the bit
ErrorIrq) to be propagated to the GlobalIrq
0
RxSOFIrqEn
Set to logic 1, it allows the RxSOF interrupt request (indicated by the bit
RxSOFIrq) to be propagated to the GlobalIrq


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