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CLRC663 Datasheet(PDF) 65 Page - NXP Semiconductors |
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CLRC663 Datasheet(HTML) 65 Page - NXP Semiconductors |
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65 / 132 page 
CLRC663 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.3 — 3 April 2012 171133 65 of 132 NXP Semiconductors CLRC663 Contactless reader IC Table 54. WaterLevel bits Bit Symbol Description 7 to 0 WaterLevel Sets a level to indicate a FIFO-buffer state which can be read from bits HighAlert and LowAlert in the FifoControl. In 512-bit FIFO mode, the register is extended by bit WaterLevel in the FIFOControl. This functionality can be used to avoid a FIFO buffer overflow or underflow: The bit HiAlert bit in FIFO Control is read logic 1, if the number of bytes in the FIFO-buffer is equal or less than the number defined by WaterLevel. The bit LoAlert bit in FIFO control is read logic 1, if the number of bytes in the FIFO buffer is equal or less than the number defined by WaterLevel. Note: For the calculation of HiAlert and LoAlert see register description of these bits (Section 9.4.1 “FIFOControl”). |
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