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CLRC663 Datasheet(PDF) 53 Page - NXP Semiconductors |
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CLRC663 Datasheet(HTML) 53 Page - NXP Semiconductors |
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53 / 132 page  CLRC663 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.3 — 3 April 2012 171133 53 of 132 NXP Semiconductors CLRC663 Contactless reader IC To leave the modem off mode clears the ModemOff bit in the register Control. 8.9.3 Low-Power Card Detection (LPCD) The low-power card detection is an energy saving modus when the CLRC663 is not fully powered permanently. The LPCD works in two phases. First the standby phase is controlled by the wake-up counter (WUC), which defines the duration of the standby of the CLRC663. Second phase is the detection-phase. In this phase the values of the I and Q channel are detected and stored in the register map. (LPCD_I_Result, LPCD_Q_Result).This time period can be handled with Timer3. The value is compared with the min/max values in the registers (LPCD_IMin, LPCD_IMax; LPCD_QMin, LPCD_QMax). If it exceeds the limits, a LPCDIrq is raised. After the command LPCD the standby of the CLRC663 is activated, if selected. The wake-up Timer4 can activate the system after a given time. For the LPCD it is recommended to set T4AutoWakeUp and T4AutoRestart, to start the timer and then go to standby. If a card is detected the timer stops and the communication can be started. If T4AutoWakeUp is not set, the IC will not enter Standby mode in case no card is detected. 8.9.4 Reset and start-up time A 10 s constant high level at the PDOWN pin starts the internal reset procedure. The following figure shows the internal voltage regulator: This internal procedure consists of two phases: • Power on reset • Startup time When the CLRC663 has finished this two phases the reader IC is in Full mode and is ready to be used. Refer to Section 13.1 “Timing characteristics” Fig 33. Internal PDown to voltage regulator logic 001aan360 PVDD PDown VSS GLITCH FILTER INTERNAL VOLTAGE REGULATOR VDD VSS 1.8 V 1.8 V AVDD DVDD |
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