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CLRC663 Datasheet(PDF) 51 Page - NXP Semiconductors |
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CLRC663 Datasheet(HTML) 51 Page - NXP Semiconductors |
51 / 132 page CLRC663 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.3 — 3 April 2012 171133 51 of 132 NXP Semiconductors CLRC663 Contactless reader IC fout = 13.56 MHz PLLDiv_FB /PLLDiv_Out 8.8.3 Low-Power Oscillator (LPO) The Low-Power Oscillator (LPO) is implemented to drive a wake-up counter (WUC). This wakes up the system in regular time intervals and eases the design of a reader that is regularly polling for card presence or implements a low-power card detection. The LPO is trimmed during production. Unless a high accuracy of the LPO is required by the application and the device is operated in an environment with changing ambient temperatures, trimming of the LPO is not required. For a typical application making use of the LPO for wake up from power down, the trim values set during production can be used. Optional trimming is supported by a digital state machine which compares LPO-clock to a reference clock. As reference the 13.56 MHz crystal clock is available. Table 41. Divider values for selected frequencies using the integerN PLL Frequency [MHz] 4 6 8 10 12 20 24 1.8432 3.6864 PLLDiv_FB 23 272328 232823 28 28 PLLDiv_Out 78 61 39 38 26 19 16 206 103 accuracy [%] 0.04 0.03 0.04 0.08 0.04 0.08 0.04 0.01 0.01 Table 42. Setting of lpo_trimm [7:0] value (decimal) LPO clocks 416 532 664 7 128 |
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