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CLRC663 Datasheet(PDF) 40 Page - NXP Semiconductors |
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CLRC663 Datasheet(HTML) 40 Page - NXP Semiconductors |
40 / 132 page ![]() CLRC663 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.3 — 3 April 2012 171133 40 of 132 NXP Semiconductors CLRC663 Contactless reader IC 8.6.2.2 Bit generator The default coding of a data stream is done by using the Bit-Generator. It is activated when the value of TxFrameCon.DCodeType is set to 0000 (bin). The Bit-Generator encodes the data stream byte-wise and can apply the following encoding steps to each data byte. 1. Add a start-bit of specified type at beginning of every byte 2. Add a stop-bit and EGT bits of a specified type. The maximum number of EGT bit is 6, only full bits are supported 3. Add a parity-bit of a specified type 4. TxFirstBits (skips a given number of bits at the beginning of the first byte in a frame) 5. TxLastBits (skips a given number of bits at the end of the last byte in a frame) 6. Encrypt data-bit (MIFARE encryption) TxFirstBits and TxLastBits can be used at the same time. If only a single data byte is sent, it must be ensured that the range of TxFirstBits and TxLastBits do not overlap. It is not possible to skip more than 8 bit of a single byte! ( (8 - TxFirstBits) + (8 - TxLastBits) ) < 8 By default, data bytes are always treated LSB first. To make use of a MSB first coding, the TxMSBFirst in the register CLCON1 needs to be set. 8.6.3 Receiver circuitry 8.6.3.1 General The CLRC663 features a versatile quadrature receiver architecture with fully differential signal input at RXP and RXN. It can be configured to achieve optimum performance for reception of various 13.56 MHz based protocols. For all processing units various adjustments can be made to obtain optimum performance. Fig 27. Example 2: overshoot_t1 = 0d; overhoot_t2 = 5d 001aan357 0 -1.0 12345 time (μs) 1.0 3.0 5.0 (V) 7.0 |
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