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CLRC663 Datasheet(PDF) 31 Page - NXP Semiconductors

Part No. CLRC663
Description  Contactless reader IC
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Maker  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
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CLRC663 Datasheet(HTML) 31 Page - NXP Semiconductors

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CLRC663
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.3 — 3 April 2012
171133
31 of 132
NXP Semiconductors
CLRC663
Contactless reader IC
8.4.6.1
Interface signals
The boundary scan interface implements a four line interface between the chip and the
environment. There are three Inputs: Test Clock (TCK); Test Mode Select (TMS); Test
Data Input (TDI) and one output Test Data Output (TDO). TCK and TMS are broadcast
signals, TDI to TDO generate a serial line called Scan path.
Advantage of this technique is that independent of the numbers of boundary scan devices
the complete path can be handled with four signal lines.
The signals TCK, TMS are directly connected with the boundary scan controller. Because
these signals are responsible for the mode of the chip, all boundary scan devices in one
scan path will be in the same boundary scan mode.
8.4.6.2
Test Clock (TCK)
The TCK pin is the input clock for the module. If this clock is provided, the test logic is able
to operate independent of any other system clocks. In addition, it ensures that multiple
boundary scan controllers that are daisy-chained together can synchronously
communicate serial test data between components. During normal operation, TCK is
driven by a free-running clock. When necessary, TCK can be stopped at 0 or 1 for
extended periods of time. While TCK is stopped at 0 or 1, the state of the boundary scan
controller does not change and data in the Instruction and Data Registers is not lost.
The internal pull-up resistor on the TCK pin is enabled. This assures that no clocking
occurs if the pin is not driven from an external source.
8.4.6.3
Test Mode Select (TMS)
The TMS pin selects the next state of the boundary scan controller. TMS is sampled on
the rising edge of TCK. Depending on the current boundary scan state and the sampled
value of TMS, the next state is entered. Because the TMS pin is sampled on the rising
edge of TCK, the IEEE Standard 1149.1 expects the value on TMS to change on the
falling edge of TCK.
Holding TMS high for five consecutive TCK cycles drives the boundary scan controller
state machine to the Test-Logic-Reset state. When the boundary scan controller enters
the Test-Logic-Reset state, the Instruction Register (IR) resets to the default instruction,
IDCODE. Therefore, this sequence can be used as a reset mechanism.
The internal pull-up resistor on the TMS pin is enabled.
8.4.6.4
Test Data Input (TDI)
The TDI pin provides a stream of serial information to the IR chain and the DR chains. TDI
is sampled on the rising edge of TCK and, depending on the current TAP state and the
current instruction, presents this data to the proper shift register chain. Because the TDI
pin is sampled on the rising edge of TCK, the IEEE Standard 1149.1 expects the value on
TDI to change on the falling edge of TCK.
The internal pull-up resistor on the TDI pin is enabled.
8.4.6.5
Test Data Output (TDO)
The TDO pin provides an output stream of serial information from the IR chain or the DR
chains. The value of TDO depends on the current TAP state, the current instruction, and
the data in the chain being accessed. In order to save power when the port is not being


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