Electronic Components Datasheet Search |
|
CLRC663 Datasheet(PDF) 29 Page - NXP Semiconductors |
|
CLRC663 Datasheet(HTML) 29 Page - NXP Semiconductors |
29 / 132 page CLRC663 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.3 — 3 April 2012 171133 29 of 132 NXP Semiconductors CLRC663 Contactless reader IC The pull-up resistor is not required for the I2CL interface. Instead, a on chip buskeeper is implemented in the CLRC663 for SDA of the I2CL interface. This protocol is intended to be used for a point to point connection of devices over a short distance and does not support a bus capability.The driver of the pin must force the line to the desired logic voltage. To avoid that two drivers are pushing the line at the same time following regulations must be fulfilled: SCL: As there is no clock stretching, the SCL is always under control of the Master. SDA: The SDA line is shared between master and slave. Therefore the master and the slave must have the control over the own driver enable line of the SDA pin. The following rules must be followed: • In the idle phase the SDA line is driven high by the master • In the time between start and stop condition the SDA line is driven by master or slave when SCL is low. If SCL is high the SDA line is not driven by any device • To keep the value on the SDA line a on chip buskeeper structure is implemented for the line 8.4.5 SAM interface I2C 8.4.5.1 SAM functionality The CLRC663 implements a dedicated I2C interface to integrate a MIFARE SAM (Secure Access Module) in a very convenient way into applications (e.g. a proximity reader). The SAM can be connected to the microcontroller to operate like a cryptographic co-processor. For any cryptographic task, the microcontroller requests a operation from the SAM, receives the answer and sends it over a host interface (e.g. I2C, SPI) interface to the connected reader IC. The MIFARE SAM supports a optimized method to integrate the SAM in a very efficient way to reduce the protocol overhead. In this system configuration, the SAM is integrated between the microprocessor and the reader IC, connected by one interface to the reader IC and by another interface to the microcontroller. In this application the microcontroller accesses the SAM using the T=1 protocol and the SAM accesses the reader IC using an I2C interface. As the SAM is directly communicating with reader IC, the communication overhead is reduced. In this configuration, a performance boost of up to 40% can be achieved for a transaction time. The MIFARE SAM supports applications using MIFARE cards. For multi application purposes an architecture connecting the microcontroller additionally directly to the reader IC is recommended. This is possible by connecting the CLRC663 on one interface (SAM Interface SDA, SCL) with the MIFARE SAM AV2.6 (P5DF081XX/T1AR1070) and by connecting the microcontroller to the S2C or SPI interface. tSU;SDA 80 - ns tHD;DAT 050 ns tSU;DAT 020 ns tSU;STO 80 - ns tBUF 200 - ns Table 24. Timing parameter I2CL Parameter Min Max Unit |
Similar Part No. - CLRC663 |
|
Similar Description - CLRC663 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |