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CLRC663 Datasheet(PDF) 2 Page - NXP Semiconductors

Part # CLRC663
Description  Contactless reader IC
Download  132 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

CLRC663 Datasheet(HTML) 2 Page - NXP Semiconductors

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CLRC663
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.3 — 3 April 2012
171133
2 of 132
NXP Semiconductors
CLRC663
Contactless reader IC
The CLRC663 is supporting the P2P passive initiator mode in accordance with
ISO/IEC 18092.
The CLRC663 supports the vicinity protocol according to ISO/IEC15693, EPC UID and
ISO/IEC 18000-3 mode 3/ EPC Class-1 HF.
The following host interfaces are supported:
Serial Peripheral Interface (SPI)
Serial UART (similar to RS232 with voltage levels dependent on pin voltage supply)
I2C-bus interface (two versions are implemented: I2C and I2CL)
The CLRC663 supports the connection of a secure access module (SAM). A dedicated
separate I2C interface is implemented for a connection of the SAM. The SAM can be used
for high secure key storage and acts as a very performant crypto coprocessor. A
dedicated SAM is available for connection to the CLRC663.
3.
Features and benefits
High RF output power frontend IC for transfer speed up to 848 kbit/s
Supports ISO/IEC 14443 A/MIFARE, ISO/IEC 14443 B and FeliCa
P2P passive initiator mode in accordance with ISO/IEC 18092
Supports ISO/IEC15693, ICODE EPC UID and ISO/IEC 18000-3 mode 3/ EPC
Class-1 HF
Supports MIFARE Classic encryption in read/write mode
Low-Power Card Detection
Compliance to “EMV contactless protocol specification V2.0.1” on RF level can be
achieved
Antenna connection with minimum number of external components
Supported host interfaces:
SPI up to 10 Mbit/s
I2C-bus interfaces up to 400 kBd in Fast mode, up to 1000 kBd in Fast mode plus
RS232 Serial UART up to 1228.8 kBd, with voltage levels dependent on pin
voltage supply
Separate I2C-bus interface for connection of a secure access module (SAM)
FIFO buffer with size of 512 byte for highest transaction performance
Flexible and efficient power saving modes including hard power down, standby and
low-power card detection
Cost saving by integrated PLL to derive system CPU clock from 27.12 MHz RF quartz
crystal
3.3 V to 5 V power supply
Up to 8 free programmable input/output pins
Typical operating distance in read/write mode for communication to a
ISO/IEC 14443A/MIFARE Card up to 12 cm, depending on the antenna size and
tuning


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