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HYB39S64160AT-8B Datasheet(PDF) 6 Page - Siemens Semiconductor Group |
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HYB39S64160AT-8B Datasheet(HTML) 6 Page - Siemens Semiconductor Group |
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6 / 53 page  Semiconductor Group 6 HYB39S64400/800/160AT(L) 64MBit Synchronous DRAM Block Diagram for 4 banks x 1M x16 SDRAM Row decoder Memory array Bank 0 4096x256 x16 bit Row decoder Memory array Bank 1 4096x256 x16 bit Row decoder Memory array Bank 2 4096x256 x16 bit Row decoder Memory array Bank 3 4096x256 x16 bit Input buffer Output buffer DQ0-DQ15 Column address counter Column address buffer Row address buffer Refresh Counter A0 - A11, BA0, BA1 A0 - A7, AP, BA0, BA1 Control logic & timing generator Row Addresses Column Addresses |
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