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IXTP110N055T2 Datasheet(PDF) 2 Page - IXYS Corporation |
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IXTP110N055T2 Datasheet(HTML) 2 Page - IXYS Corporation |
2 / 11 page DC to DC Synchronous Converter Design Abdus Sattar, IXYS Corporation IXAN0068 2 In Figure 1, the Q1 is called the high-side or control FET and Q2 is called the low-side or sync FET applied in a step-down DC to DC synchronous converter application. The ratio Vin Vo / is controlled by the duty cycle of Q1. To improve the efficiency, it’s desirable to have Q2 turned ON when Q1 is turned OFF. A simplified switch state diagram is shown in Figure 2 [2]. It depicts the switching sequence as A-B- C-B-A where the state B called “dead time” when both Q1 and Q2 are OFF and the Schottky diode, D1 is ON to provide the freewheeling operation in the inductive load circuit. It’s desirable to reduce the dead time to a minimum to improve the efficiency. However, if the dead time is lower than the turn-on or turn-off times of Q1 and Q2, the circuit may go into state D, the shoot-through state when both Q1 and Q2 are ON at the same time causing a short-circuit in the input voltage source, Vin. The state D is undesirable since it would destroy transistors Q1 and Q2. Figure 2: Circuit Switch State Diagram [2] |
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