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HYB39S16400 Datasheet(PDF) 5 Page - Siemens Semiconductor Group

Part No. HYB39S16400
Description  16 MBit Synchronous DRAM
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Manufacturer  SIEMENS [Siemens Semiconductor Group]
Direct Link  http://www.siemens.com/
Logo SIEMENS - Siemens Semiconductor Group

HYB39S16400 Datasheet(HTML) 5 Page - Siemens Semiconductor Group

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HYB 39S16400/800/160AT-8/-10
16 MBit Synchronous DRAM
Semiconductor Group
5
1998-10-01
DQM
LDQM
UDQM
Input
Pulse
Active
High
The Data Input/Output mask places the DQ buffers in a
high impedance state when sampled high. In Read mode,
DQM has a latency of two clock cycles and controls the
output buffers like an output enable. In Write mode, DQM
has a latency of zero and operates as a word mask by
allowing input data to be written if it is low but blocks the
write operation if DQM is high.
V
DD
V
SS
Supply –
Power and ground for the input buffers and the core logic.
V
DDQ
V
SSQ
Supply –
Isolated power supply and ground for the output buffers to
provide improved noise immunity.
Signal Pin Description (cont’d)
Pin
Type
Signal Polarity Function


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