71M6534 datasheet(45/132 Pages) MAXIM | Exceeds IEC 62053/ANSI C12.20 Standards

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FDS_6533_6534_004

71M6533/G/H and 71M6534/H Data Sheet

Rev 2

Since the control for DIO_24 through DIO_55 is shared with the control for LCD segments, the firmware

must take care not to disturb the DIO pins when accessing the LCD segments and vice versa. Usually,

this requires reading the I/O RAM register, applying a mask and writing back the modified byte.

DIO4 and DIO5 can be configured to implement the EEPROM Interface.

Additionally, if DIO6 and DIO7 are configured as DIO and defined as outputs, they can be used as dedicated

pulse outputs (WPULSE = DIO6, VARPULSE = DIO7) using the DIO_PW and DIO_PV bits. In this case,

DIO6 and DIO7 are under CE control. Similarly, DIO8 and DIO9 can be declared pulse outputs (XPULSE =

DIO8, YPULSE = DIO9).

The PB pin is a dedicated digital input. In addition, if the optical UART is not used, OPT_TX and OPT_RX can

be configured as dedicated DIO pins, DIO1and DIO2, respectively (see Section 1.5.6 Optical Interface).

Tracking DIO pins configured as outputs is useful for pulse counting without external hardware.

Either the interrupts or the counter/timer clocks can be used to count the pulse outputs, or

interrupt on the CE’s power failure output.

A 3-bit configuration word, I/O RAM register DIO_Rn (0x2009[2:0] through 0x200E[6:4]) can be used for

certain pins (when configured as DIO) to individually assign an internal resource such as an interrupt or a

timer control (DIO_RRX configures the RX pin). This way, DIO pins can be tracked even if they are

configured as outputs. See Table 39 for DIO pins available for this option.

Table 43 lists the internal resources which can be assigned using DIO_R0 (also called DIO_RPB) through

DIO_R7. If more than one input is connected to the same resource, the resources are combined using a

logical OR.

Table 43: Selectable Resources using the DIO_Rn Bits

DIO_Rn

Resource Selected for DIO Pin

None

Reserved

T0 (counter0 clock)

T1 (counter1 clock)

High priority I/O interrupt (INT0 rising)

Low priority I/O interrupt (INT1 rising)

High priority I/O interrupt (INT0 falling)

Low priority I/O interrupt (INT1 falling)

When driving LEDs, relay coils etc., the DIO pins should sink the current into GNDD (as shown in

Figure 9, right), not source it from V3P3D (as shown in Figure 9, left). This is due to the resistance

of the internal switch that connects V3P3D to either V3P3SYS or VBAT.

Sourcing current into or out of DIO pins other than the PB pin, for example with pull-up or pull-

down resistors, should be avoided. Violating this rule will lead to increased quiescent current in

SLEEP and LCD modes.

71M6534 Datasheet(PDF) 45 Page - Maxim Integrated Products