71M6534 datasheet(18/132 Pages) MAXIM | Exceeds IEC 62053/ANSI C12.20 Standards

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71M6533/G/H and 71M6534/H Data Sheet

FDS_6533_6534_004

Rev 2

Figure 6: Accumulation Interval

Figure 6 shows the accumulation interval resulting from PRE_SAMPS[1:0] = 42 and SUM_CYCLES[5:0] = 50,

consisting of 2100 samples of 397µs each, followed by the XFER_BUSY interrupt. The sampling in this

example is applied to a 50 Hz signal.

There is no correlation between the line signal frequency and the choice of PRE_SAMPS[1:0] or

SUM_CYCLES[5:0] (even though when SUM_CYCLES[5:0] = 42, one set of SUM_CYCLES happens to

sample a period of 16.6 ms). Furthermore, sampling does not have to start when the line voltage crosses

the zero line, and the length of the accumulation interval need not be an integer multiple of the signal cycles.

1.3.6 Delay Compensation

When measuring the energy of a phase (i.e., Wh and VARh) in a service, the voltage and current for that

phase must be sampled at the same instant. Otherwise, the phase difference, Ф, introduces errors.

delay

360

⋅

Where f is the frequency of the input signal and tdelay is the sampling delay between voltage and current.

In traditional meter ICs, sampling is accomplished by using two A/D converters per phase (one for voltage

and the other one for current) controlled to sample simultaneously. Our Single Converter Technology,

however, exploits the 32-bit signal processing capability of its CE to implement “constant delay” all-pass

filters. These all-pass filters correct for the conversion time difference between the voltage and the

corresponding current samples that are obtained with a single multiplexed A/D converter.

The “constant delay” all-pass filters provide a broad-band delay β that is precisely matched to the differ-

ence in sample time between the voltage and the current of a given phase. This digital filter does not

affect the amplitude of the signal, but provides a precisely controlled phase response. The delay

compensation implemented in the CE aligns the voltage samples with their corresponding current

samples by routing the voltage samples through the all-pass filter, thus delaying the voltage samples by

β, resulting in the residual phase error β – Ф. The residual phase error is negligible, and is typically less

than ±1.5 millidegrees at 100Hz, thus it does not contribute to errors in the energy measurements.

XFER_BUSY

Interrupt to MPU

20ms

833ms

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