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71M6534 Datasheet(PDF) 12 Page - Maxim Integrated Products |
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71M6534 Datasheet(HTML) 12 Page - Maxim Integrated Products |
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12 / 132 page  71M6533/G/H and 71M6534/H Data Sheet FDS_6533_6534_004 12 Rev 2 Table 3: ADC RAM Locations Signal Number Address (HEX) Name Signal Number Address (HEX) Name 0 0x00 IA 5 0x05 VC 1 0x01 VA 6 0x06 ID 2 0x02 IB 0x0A 0x0A TEMP 3 0x03 VB 0x0B 0x0B VBAT 4 0x04 IC 1.2.5 Voltage References The device includes an on-chip precision bandgap voltage reference that incorporates auto-zero techniques. The reference is trimmed in production to minimize errors caused by component mismatch and drift. The result is a voltage output with a predictable temperature coefficient. The amplifier within the reference is chopper stabilized, i.e. the polarity can be switched by the MPU using CHOP_E[1:0] (I/O RAM 0x2002[5:4]). The CHOP_E[1:0] field enables the MPU to operate the chopper circuit in regular or inverted operation, or in toggling mode. When the chopper circuit is toggled in between multiplexer cycles, DC offsets on the measured signals will automatically be averaged out. The general topology of a chopped amplifier is shown in Figure 2. Figure 2: General Topology of a Chopped Amplifier It is assumed that an offset voltage Voff appears at the positive amplifier input. With all switches, as controlled by CROSS, in the A position, the output voltage is: Voutp – Voutn = G (Vinp + Voff – Vinn) = G (Vinp – Vinn) + G Voff With all switches set to the B position by applying the inverted CROSS signal, the output voltage is: Voutn – Voutp = G (Vinn – Vinp + Voff) = G (Vinn – Vinp) + G Voff, or Voutp – Voutn = G (Vinp – Vinn) - G Voff Thus, when CROSS is toggled, e.g. after each multiplexer cycle, the offset will alternately appear on the output as positive and negative, which results in the offset effectively being eliminated, regardless of its polarity or magnitude. When CROSS is high, the connection of the amplifier input devices is reversed. This preserves the overall polarity of that amplifier gain; it inverts its input offset. By alternately reversing the connection, the amplifier’s offset is averaged to zero. This removes the most significant long-term drift mechanism in the voltage reference. The CHOP_E[1:0] field controls the behavior of CROSS. The CROSS signal will reverse the amplifier connection in the voltage reference in order to negate the effects of its offset. On the first CK32 rising edge after the last multiplexer state of its sequence, the multiplexer will wait one additional CK32 cycle before beginning a new frame. At the beginning of this cycle, the value of CROSS will be updated according to the CHOP_E[1:0] field. The extra CK32 cycle allows time for the chopped VREF to settle. During this cycle, MUXSYNC is held high. The leading edge of MUXSYNC initiates a pass through the CE program sequence. The beginning of the sequence is the serial readout of the four RTM words. G - + Vinp Voutp Voutn Vinn CROSS A B A B A B A B |
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