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KSZ8841-16 Datasheet(PDF) 77 Page - Micrel Semiconductor |
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KSZ8841-16 Datasheet(HTML) 77 Page - Micrel Semiconductor |
77 / 105 page Micrel, Inc. KSZ8841-16/32 MQL/MVL/MBL October 2007 77 M9999-102207-1.6 Bank 45 PHY 1 MII-Register Basic Status Register (0x02): P1MBSR This register contains the MII register status for the chip function. Bit Default R/W Description Bit is same as: 15 0 RO T4 Capable 1 = 100 BASE-T4 capable. 0 = not 100 BASE-T4 capable. 14 1 RO 100 Full Capable 1 = 100BASE-TX full-duplex capable. 0 = not 100BASE-TX full duplex.capable. 13 1 RO 100 Half Capable 1= 100BASE-TX half-duplex capable. 0= not 100BASE-TX half-duplex capable. 12 1 RO 10 Full Capable 1 = 10BASE-T full-duplex capable. 0 = not 10BASE-T full-duplex capable. 11 1 RO 10 Half Capable 1 = 10BASE-T half-duplex capable. 0 = not 10BASE-T half-duplex capable. 10-7 0 RO Reserved. 6 0 RO Preamble suppressed Not supported. 5 0 RO AN Complete 1 = auto-negotiation complete. 0 = auto-negotiation not completed. Bank49 0x4 bit6 4 0 RO Reserved Bank49 0x4 bit8 3 1 RO AN Capable 1 = auto-negotiation capable. 0 = not auto-negotiation capable. 2 0 RO Link Status 1 = link is up. 0 = link is down. Bank49 0x4 bit5 1 0 RO Jabber test Not supported. 0 0 RO Extended Capable 1 = extended register capable. 0 = not extended register capable. Bank 45 PHY 1 PHYID Low Register (0x04): PHY1ILR This register contains the PHY ID (low) for the chip. Bit Default R/W Description 15-0 0x1430 RO PHYID Low Low order PHYID bits. |
Similar Part No. - KSZ8841-16_08 |
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Similar Description - KSZ8841-16_08 |
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