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KSZ8895MQ Datasheet(PDF) 67 Page - Micrel Semiconductor |
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KSZ8895MQ Datasheet(HTML) 67 Page - Micrel Semiconductor |
67 / 116 page Micrel, Inc. KSZ8895MQ/RQ/FMQ March 2012 67 M9999-032612-1.5 Port Registers (Continued) Register 19 (0x13): Port 1 Control 3 Register 35 (0x23): Port 2 Control 3 Register 51 (0x33): Port 3 Control 3 Register 67 (0x43): Port 4 Control 3 Register 83 (0x53): Port 5 Control 3 Address Name Description Mode Default 7-0 Default Tag [15:8] Port’s default tag, containing: 7-5: user priority bits 4: CFI bit 3-0 : VID[11:8] R/W 0 Register 20 (0x14): Port 1 Control 4 Register 36 (0x24): Port 2 Control 4 Register 52 (0x34): Port 3 Control 4 Register 68 (0x44): Port 4 Control 4 Register 84 (0x54): Port 5 Control 4 Address Name Description Mode Default 7-0 Default Tag [7:0] Default port 1’s tag, containing: 7-0: VID[7:0] R/W 1 Note: Registers 19 and 20 (and those corresponding to other ports) serve two purposes: (1) Associated with the ingress untagged packets, and used for egress tagging; (2) Default VID for the ingress untagged or null-VID-tagged packets, and used for address look up. Register 87 (0x57): RMII Management Control Register Address Name Description Mode Default 7 - 4 Reserved N/A Do not change. RO 0000 3 Port 5 SW5-RMII 50MHz clock output disable (used for KSZ8895RQ only) Disable the output of port 5 SW5-RMII 50 MHz output clock on RXC pin when 50MHz clock is not being used by the device and the 50MHz clock from external oscillator or opposite device in RMII mode 1 = Disable clock output when RXC pin is not used in RMII mode 0 = Enable clock output in RMII mode Note:MQ/FMQ is reserved with read only for this bit. R/W 0 2 P5-RMII 50MHz clock output disable (used for KSZ8895RQ only) Disable the output of port 5 P5-RMII 50 MHz output clock on RXC pin when 50MHz clock is not being used by the device and the 50MHz clock from external oscillator or opposite device in RMII mode 1 = Disable clock output when RXC pin is not used in RMII mode 0 = Enable clock output in RMII mode Note:MQ/FMQ is reserved with read only for this bit. R/W 0 1 - 0 Reserved N/A Do not change. RO 00 |
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