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SM802120 Datasheet(PDF) 3 Page - Micrel Semiconductor |
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SM802120 Datasheet(HTML) 3 Page - Micrel Semiconductor |
3 / 12 page Micrel, Inc. SM802120 September 2011 3 M9999-092911-A hbwhelp@micrel.com or (408) 955-1690 Pin Description Pin Number Pin Name Pin Type Pin Level Pin Function 25, 26 28, 29 32, 33 35, 36 /Q1, Q1 /Q2, Q2 /Q3, Q3 /Q4, Q4 O, (DIF) LVDS Differential Clock Outputs from Bank 1 125MHz 41, 42 1, 2 /Q5, Q5 /Q6, Q6 O, (DIF) LVDS Differential Clock Outputs from Bank 2 125MHz 4, 5 7, 8 /Q7, Q7 /Q8, Q8 O, (DIF) HCSL Differential Clock Outputs from Bank 2 125MHz 31, 37, 38 VDDO1 PWR Power Supply for the Outputs on Bank 1 43, 44, 16 VDDO2 PWR Power Supply for the Outputs on Bank 2 24, 39 VSSO1 PWR Power Supply Ground for the Outputs on Bank 1 3, 6, 40 VSSO2 PWR Power Supply Ground for the Outputs on Bank 2 10, 11, 14, 17, 20, 27, 30, 34 TEST Factory Test Pins. Do not connect anything to these pins. 12, 13 VDD PWR Core Power Supply 9, 21, 23 VSS (Exposed Pad) PWR Core Power Supply Ground. The exposed pad must be connected to the VSS ground plane. 18 XTAL_IN I, (SE) Crystal Crystal Reference Input, no load caps needed. See Fig. 7. 19 XTAL_OUT O, (SE) Crystal Crystal Reference Output, no load caps needed. See Fig. 7. 15 OE1 I, (SE) LVCMOS Output Enable, Q1-Q4 disables to tri-state, 0 = Disabled, 1 = Enabled, 45KΩ pull-up 22 OE2 I, (SE) LVCMOS Output Enable, Q5-Q8 disables to tri-state, 0 = Disabled, 1 = Enabled, 45KΩ pull-up Truth Table OE1/2 OUTPUTS 0 Tri-state 1 HCSL / LVDS |
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