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SY100S391JZTR Datasheet(PDF) 1 Page - Micrel Semiconductor |
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SY100S391JZTR Datasheet(HTML) 1 Page - Micrel Semiconductor |
1 / 6 page 1 SY100S391 Micrel, Inc. M9999-042307 hbwhelp@micrel.com or (408) 955-1690 FEATURES s Operates from a single +5V supply s Differential PECL outputs s Function and pinout compatible with Fairchild F100K s Available in 28-pin PLCC packages DESCRIPTION The SY100S391 is a hex TTL-to-PECL translator for converting TTL logic levels to 100K logic levels. The unique feature of this translator is the ability to do this translation using only one +5V supply. The differential outputs allow each circuit to be used as an inverting/non-inverting translator, or as a differential line driver. A common enable (E), when LOW, holds all inverting outputs HIGH and all non-inverting inputs LOW. The SY100S391 is ideal for those mixed PECL/TTL applications which only have a +5V supply available. When used in the differential mode, the S391, due to its high common mode rejection, overcomes voltage gradients between the TTL and PECL ground systems. Rev.: I Amendment: /0 Issue Date: April 2007 SY100S391 LOW-POWER HEX TTL-TO-PECL TRANSLATOR Pin Function D0 — D5 Data Inputs (TTL) Q0 — Q5 Data Outputs (PECL) Q0 — Q5 Inverting Data Outputs (PECL) E Enable Input (TTL) VCCA VCCO for ECL Outputs PIN NAMES BLOCK DIAGRAM D0 D1 D2 D3 D4 D5 E Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 Q4 Q4 Q5 Q5 |
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