Micrel, Inc.

SY89473U

May 2007

3

M9999-052207-B

Pin Description

Pin Number

Pin Name

Pin Function

5, 2,

23, 20

IN0, /IN0

IN1, /IN1

Differential Inputs: These input pairs are the differential signal inputs to the device.

these inputs will default to an indeterminate state if left open. Each pin of a pair

internally terminates to a VT pin through 50Ω. Please refer to the “Input Interface

Applications” section for more details.

3, 21

VREF-AC1

coupling inputs IN and /IN. Connect VREF-AC directly to the corresponding VT pin.

Bypass with 0.01µF low ESR capacitor to VCC. Maximum sink/source current is

±1.5mA. Due to the limited drive capability, the VREF-AC pin is only intended to

drive its respective VT pin. Please refer to the “Input Interface Applications” section

for more details.

4, 22

Input Termination Center-Tap: Each side of the differential input pair terminates to

a VT pin. The VT0 and VT1 pins provide a center-tap to a termination network for

maximum interface flexibility. Please refer to the “Input Interface Applications”

section for more details.

1, 6, 9, 10, 13,

19, 24

VCC

Positive Power Supply: Connect to +2.5V or +3.3V power supply. Bypass with

0.1µF//0.01µF low ESR capacitors as close to VCC pins as possible.

7, 8

11, 12

Q0, /Q0

Q1, /Q1

Differential Outputs: These differential LVPECL output pairs are a logic function of

the IN0, IN1, and SEL inputs. Please refer to the truth table below for details.

Unused output pairs can be left floating with no impact on jitter.

15

SEL

This single-ended TTL/CMOS-compatible input selects the inputs to the

multiplexer. Note that this input is internally connected to a 25kΩ pull-up resistor

“Timing Diagram” section for more details.

14, 17, 18

GND, Exposed

Pad

Ground: Ground pins and exposed pad must be connected to the same ground

plane.

Truth Table

INPUTS

OUTPUTS

IN0

/IN0

IN1

/IN1

SEL

Q

/Q

0

1

X

X

0

0

1

1

0

X

X

0

1

0

X

X

0

1

1

0

1

X

X

1

0

1

1

0