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SY89842U Datasheet(PDF) 9 Page - Micrel Semiconductor

Part # SY89842U
Description  Precision CML Runt Pulse Eliminator 2:1
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Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

SY89842U Datasheet(HTML) 9 Page - Micrel Semiconductor

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Micrel, Inc.
SY89842U
March 2005
M9999-030805
hbwhelp@micrel.com or (408) 955-1690
9
Case #2: Input Clock Failure: Switching from a
selected clock stuck HIGH to a valid clock (RPE
enabled).
If CLK1 fails HIGH before the RPE MUX selects
CLK2 (using the SEL pin), the switchover will occur
in three stages.
• Stage 1: The output will remain HIGH for a
limited number of pulses of CLK2.
• Stage 2: The output will switch to LOW and then
remain LOW for a limited number of falling edges
of CLK2.
• Stage 3: The output will follow CLK2.
Timing Diagram 2
Note: Output shows extended clock cycle during switchover. Pulse width for both high and low of this cycle will always be
greater than 50% of the CLK2 period.
Case #3: Input Clock Failure: Switching from a
selected clock stuck Low to a valid clock (RPE
enabled).
If CLK1 fails LOW before the RPE MUX selects
CLK2 (using the SEL pin), the switchover will occur
in two stages.
• Stage 1: The output will remain LOW for a
limited number of falling edges of CLK2.
• Stage 2: The output will follow CLK2.
Timing Diagram 3


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