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SY89843UMGTR Datasheet(PDF) 10 Page - Micrel Semiconductor |
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SY89843UMGTR Datasheet(HTML) 10 Page - Micrel Semiconductor |
10 / 17 page Micrel, Inc. SY89843U May 2007 10 M9999-052207-B hbwhelp@micrel.com or (408) 955-1690 Case #3 Input Clock Failure: Switching from a selected clock stuck Low to a valid clock (RPE enabled). If CLK1 fails LOW before the RPE MUX selects CLK2 (using the SEL pin), the switchover will occur in two stages. • Stage 1: The output will remain LOW for a limited number of falling edges of CLK2. • Stage 2: The output will follow CLK2. Timing Diagram 3 |
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