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R5F5630ADDFB Datasheet(PDF) 6 Page - Renesas Technology Corp |
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R5F5630ADDFB Datasheet(HTML) 6 Page - Renesas Technology Corp |
6 / 165 page R01DS0060EJ0100 Rev.1.00 Page 6 of 168 Sep 13, 2011 RX630 Group 1. Overview 10-bit A/D converter (ADb) 1 unit (1 unit × 8 channels) 10-bit resolution Conversion time: 1.0 µs per channel (in operation with PCLK at 50 MHz) Operating mode Scan mode (single scan mode or continuous scan mode) External amplifier connection mode Sample-and-hold function Three ways to start A/D conversion Conversion can be started by software, a conversion start trigger from a timer (MTU, TPU, or TMR), or an external trigger signal. D/A converter (DAa) 2 channels 10-bit resolution Output voltage: 0 V to VREFH Temperature sensor 1 channel Precision: TBD Absolute accuracy: TBD The voltage of the temperature is converted into a digital value by the 12-bit A/D converter. CRC calculator (CRC) CRC code generation for arbitrary amounts of data in 8-bit units Select any of three generating polynomials: X8 + X2 + X + 1, X16 + X15 + X2 + 1, or X16 + X12 + X5 + 1. Generation of CRC codes for use with LSB-first or MSB-first communications is selectable Operating frequency Up to 100 MHz Power supply voltage VCC = AVCC0 = VREFH = 2.7 to 3.6 V, VREFH0 = 2.7 V to AVCC0, Vbatt = 2.0 to 3.6 V Supply current TBD mA Operating temperature 40 to +85C (products with wide-temperature-range spec.) Package 177-pin TFLGA (PTLG0177KA-A) (in planning) 176-pin LFBGA (PLBG0176GA-A) (in planning) 176-pin LQFP (PLQP0176KB-A) 145-pin TFLGA (PTLG0145KA-A) (in planning) 144-pin LQFP (PLQP0144KA-A) 100-pin TFLGA (PTLG0100KA-A) (in planning) 100-pin LQFP (PLQP0100KB-A) 80-pin LQFP (PLQP0080KB-A) On-chip debugging system E1 emulator (JTAG and FINE interfaces) E20 emulator (JTAG interface) Table 1.1 Outline of Specifications (5/5) Classification Module/Function Description |
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