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R1LV0216BSB Datasheet(PDF) 8 Page - Renesas Technology Corp

Part No. R1LV0216BSB
Description  2Mb Advanced LPSRAM (128k word x 16bit)
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Maker  RENESAS [Renesas Technology Corp]
Homepage  http://www.renesas.com
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R1LV0216BSB Datasheet(HTML) 8 Page - Renesas Technology Corp

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R1LV0216BSB
R10DS0051EJ0100 Rev.1.00
Page 8 of 14
2011.03.30
Write Cycle
R1LV0216BSB-5S*
R1LV0216BSB-7S*
Parameter
Symbol
Min.
Max.
Min.
Max.
Unit
Note
Write cycle time
tWC
55
-
70
-
ns
Address valid to end of write
tAW
50
-
55
-
ns
Chip select to end of write
tCW
50
-
55
-
ns
5
Write pulse width
tWP
45
-
50
-
ns
4
LB#, UB# valid to end of write
tBW
50
-
55
-
ns
Address setup time
tAS
0
-
0
-
ns
6
Write recovery time
tWR
0
-
0
-
ns
7
Data to write time overlap
tDW
25
-
30
-
ns
Data hold from write time
tDH
0
-
0
-
ns
Output enable from end of write
tOW
5
-
5
-
ns
2
Output disable to output in high-Z
tOHZ
0
20
0
25
ns
1,2
Write to output in high-Z
tWHZ
0
20
0
25
ns
1,2
Note
1. tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit conditions and are not
referred to output voltage levels.
2. This parameter is sampled and not 100% tested.
3. At any given temperature and voltage condition, tHZ max is less than tLZ min both for a given device and from
device to device.
4. A write occurs during the overlap of a low CS#, a low WE# and a low LB# or a low UB#.
A write begins at the latest transition among CS# going low, WE# going low and LB# going low or UB# going
low.
A write ends at the earliest transition among CS# going high, WE# going high and LB# going high or UB#
going high.
tWP is measured from the beginning of write to the end of write.
5. tCW is measured from the later of CS# going low to end of write.
6. tAS is measured the address valid to the beginning of write.
7. tWR is measured from the earliest of CS#, WE#, LB# or UB# going high to the end of write cycle.
8. Don’t apply inverted phase signal externally when DQ pin is output mode.


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