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SAB-C504-2RM Datasheet(PDF) 37 Page - Siemens Semiconductor Group |
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SAB-C504-2RM Datasheet(HTML) 37 Page - Siemens Semiconductor Group |
37 / 49 page Semiconductor Group 37 C504 A/D Converter Characteristics V CC = 5 V + 10%, – 15%; VSS =0V T A = 0 to 70 °C for the SAB-C504 4V ≤ V AREF ≤ V CC + 0.1 V; T A = – 40 to 85 °C for the SAF-C504 V SS – 0.1 V ≤ V AGND ≤ V SS + 0.2 V; T A = – 40 to 110 °C for the SAH-C504 T A = – 40 to 125 °C for the SAK-C504 Notes see next page. Clock calculation table : Further timing conditions : tADC min = 500 ns tIN = 2 / fOSC = 2 tCLCL Parameter Symbol Limit Values Unit Test Condition min. max. Analog input voltage V AIN V AGND V AREF V 1) Sample time t S – 64 x t IN 32 x t IN 16 x t IN 8 x t IN ns Prescaler ÷ 32 Prescaler ÷ 16 Prescaler ÷ 8 Prescaler ÷ 4 2) Conversion cycle time t ADCC – 384 x t IN 192 x t IN 96 x t IN 48 x t IN ns Prescaler ÷ 32 Prescaler ÷ 16 Prescaler ÷ 8 Prescaler ÷ 4 3) Total unadjusted error TUE – ± 2 LSB VSS + 0.5V ≤ VIN ≤ VCC – 0.5V 4) – ± 4 LSB VSS < VIN < VSS + 0.5V VCC – 0.5V < VIN < VCC 4) Internal resistance of reference voltage source R AREF – t ADC / 250 – 0.25 k Ω t ADC in [ns] 5) 6) Internal resistance of analog source R ASRC – t S / 500 – 0.25 k Ω t S in [ns] 2) 6) ADC input capacitance C AIN –50 pF 6) Clock Prescaler Ratio ADCL1, 0 tADC tS tADCC ÷ 32 1 1 32 x tIN 64 x tIN 384 x tIN ÷ 16 1 0 16 x tIN 32 x tIN 192 x tIN ÷ 8 0 1 8 x tIN 16 x tIN 96 x tIN ÷ 4 0 0 4 x tIN 8 x tIN 48 x tIN |
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