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MCM32257B Datasheet(PDF) 6 Page - Motorola, Inc |
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MCM32257B Datasheet(HTML) 6 Page - Motorola, Inc |
6 / 8 page MCM32257B 6–6 MOTOROLA FAST SRAM WRITE CYCLE 1 (W Controlled, See Notes 1 and 2) MCM32257B–15 MCM32257B–20 MCM32257B–25 Parameter Symbol Min Max Min Max Min Max Unit Notes Write Cycle Time tAVAV 15 — 20 — 25 — ns 3 Address Setup Time tAVWL 0 — 0 — 0 — ns Address Valid to End of Write tAVWH 12 — 15 — 17 — ns Write Pulse Width tWLWH, tWLEH 12 — 15 — 17 — ns Data Valid to End of Write tDVWH 7 — 8 — 10 — ns Data Hold Time tWHDX 0 — 0 — 0 — ns Write Low to Data High–Z tWLQZ 0 6 0 7 0 8 ns 4,5,6 Write High to Output Active tWHQX 5 — 5 — 5 — ns 4,5,6 Write Recovery Time tWHAX 0 — 0 — 0 — ns NOTES: 1. A write occurs during the overlap of E low and W low. 2. E1 – E4 are represented by E in these timing specifications, any combination of Exs may be asserted. G is a don‘t care when W is low. 3. All write cycle timing is referenced from the last valid address to the first transitioning address. 4. Transition is measured ± 500 mV from steady–state voltage with load of Figure 1B. 5. This parameter is sampled and not 100% tested. 6. At any given voltage and temperature, tWLQZ max is less than tWHQX min both for a given device and from device to device. WRITE CYCLE 1 DATA VALID HIGH–Z HIGH–Z tAVAV tAVWH tWHAX tWHDX tWHQX tWLWH tAVWL tDVWH tWLQZ A (ADDRESS) Ex (BYTE ENABLE) W (WRITE ENABLE) D (DATA IN) Q (DATA OUT) |
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