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AT88SA10HS-SH-T Datasheet(PDF) 5 Page - ATMEL Corporation |
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AT88SA10HS-SH-T Datasheet(HTML) 5 Page - ATMEL Corporation |
5 / 25 page Atmel AT88SA10HS [DATASHEET] 5 8595G −CRYPTO−9/11 2.1 IO Tokens There are a number of IO tokens Input: (To AT88SA10HS) that may be transmitted along the bus: Wake Wake the AT88SA10HS up from sleep (low power) state Zero Send a single bit from system to the AT88SA10HS with a value of zero One Send a single bit from system to the AT88SA10HS with a value of one Output: (From AT88SA10HS) ZeroOut Send a single bit from the AT88SA10HS to the system with a value of zero OneOut Send a single bit from the AT88SA10HS to the system with a value of one The waveforms are the same in either direction, however there are some differences in timing based on the expectation that the host has a very accurate and consistent clock while AT88SA10HS has significant variation in its internal clock generator due to normal manufacturing and environmental fluctuations. The bit timings are designed to permit a standard UART running at 230.4 K baud to transmit and receive the tokens efficiently. Each byte transmitted or received by the UART corresponds to a single bit received or transmitted by the AT88SA10HS. See applications notes on the Atmel website for more details. 2.2 AC Parameters t START t ZHI t ZLO data comm WAKE LOGIC Ø t START t BIT LOGIC 1 t LIGNORE t HIGNORE NOISE SUPPRESION t WLO t WHI |
Similar Part No. - AT88SA10HS-SH-T |
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Similar Description - AT88SA10HS-SH-T |
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