Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

AD5114 Datasheet(PDF) 19 Page - Analog Devices

Part No. AD5114
Description  Single-Channel, 128-/64-/32-Position, Up/Down, ±8% Resistor Tolerance, Nonvolatile Digital Potentiometer
Download  24 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  AD [Analog Devices]
Homepage  http://www.analog.com
Logo 

AD5114 Datasheet(HTML) 19 Page - Analog Devices

Zoom Inzoom in Zoom Outzoom out
 19 / 24 page
background image
Data Sheet
AD5111/AD5113/AD5115
Rev. 0 | Page 19 of 24
RDAC ARCHITECTURE
To achieve optimum performance, Analog Devices, Inc., has
patented the RDAC segmentation architecture for all the digital
potentiometers. In particular, the AD5111/AD5113/AD5115
employ a two-stage segmentation approach as shown in
Figure 42. The AD5111/AD5113/AD5115 wiper switch is
designed with the transmission gate CMOS topology and with
the gate voltage derived from VDD.
RL
RL
RL
RL
RS
W
RS
A
B
BS
5-BIT/6-BIT/7-BIT
ADDRESS
DECODER
TS
Figure 42. AD5111/AD5113/AD5115 Simplified RDAC Circuit
Low Wiper Resistance Feature
In addition, the AD5111/AD5113/AD5115 include a new
feature to reduce the resistance between terminals. These extra
steps are called bottom scale and top scale. At bottom scale, the
typical wiper resistance decreases from 70 Ω to 45 Ω. At top
scale, the resistance between Terminal A and Terminal W is
decreased by 1 LSB and the total resistance is reduced to 70 Ω.
The extra steps are not equal to 1 LSB and are not included in
the INL, DNL, R-INL, and R-DNL specifications.
PROGRAMMING THE VARIABLE RESISTOR
Rheostat Operation—±8% Resistor Tolerance
The AD5111/AD5113/AD5115 operate in rheostat mode when
only two terminals are used as a variable resistor. The unused
terminal can be floating or tied to the W terminal as shown in
Figure 43.
A
W
B
A
W
B
A
W
B
Figure 43. Rheostat Mode Configuration
The nominal resistance between Terminal A and Terminal B,
RAB, is available in 5 kΩ, 10 kΩ, and 80 kΩ and has 128/64/32
tap points accessed by the wiper terminal. The 5-/6-/7-bit data
in the RDAC latch is decoded to select one of the 128/64/32
possible wiper settings. The general equations for determining
the digitally programmed output resistance between the W
terminal and B terminal are
AD5111:
BS
WB
R
R
Bottom scale (1)
W
AB
WB
R
R
D
D
R
128
)
(
From 0 to 128 (2)
AD5113:
BS
WB
R
R
Bottom scale (3)
W
AB
WB
R
R
D
D
R
64
)
(
From 0 to 64 (4)
AD5115:
BS
WB
R
R
Bottom scale (5)
W
AB
WB
R
R
D
D
R
32
)
(
From 0 to 32 (6)
where:
D is the decimal equivalent of the binary code in the 5-/6-/7-bit
RDAC register; 128, 64, and 32 refer to the top scale step.
RAB is the end-to-end resistance.
RW is the wiper resistance.
RBS is the wiper resistance at bottom scale.


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn