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AD5112 Datasheet(PDF) 26 Page - Analog Devices

Part No. AD5112
Description  Single-Channel, 128-/64-/32-Position, I2C, ±8% Resistor Tolerance, Nonvolatile Digital Potentiometer
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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AD5112 Datasheet(HTML) 26 Page - Analog Devices

 
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AD5110/AD5112/AD5114
Data Sheet
Rev. 0 | Page 26 of 28
TERMINAL VOLTAGE OPERATING RANGE
The AD5110/AD5112/AD5114 are designed with internal
ESD diodes for protection. These diodes also set the voltage
boundary of the terminal operating voltages. Positive signals
present on Terminal A, Terminal B, or Terminal W that
exceed VDD are clamped by the forward-biased diode. There
is no polarity constraint between VA, VW, and VB, but they
cannot be higher than VDD or lower than GND.
GND
VDD
A
W
B
Figure 49. Maximum Terminal Voltages Set by VDD and GND
POWER-UP SEQUENCE
Because there are diodes to limit the voltage compliance at
Terminal A, Terminal B, and Terminal W (Figure 49), it is
important to power VDD first before applying any voltage
to Terminal A, Terminal B, and Terminal W. Otherwise,
the diode is forward-biased such that VDD is powered
unintentionally. The ideal power-up sequence is GND,
VDD, VLOGIC, digital inputs, and VA, VB, and VW. The order
of powering VA, VB, VW, and digital inputs is not important as
long as they are powered after VDD and VLOGIC. Regardless of the
power-up sequence and the ramp rates of the power supplies,
once VLOGIC is powered, the power-on preset activates, which
restores EEPROM values to the RDAC registers.
LAYOUT AND POWER SUPPLY BIASING
It is always a good practice to use compact, minimum lead
length layout design. The leads to the input should be as direct
as possible with a minimum conductor length. Ground paths
should have low resistance and low inductance. It is also good
practice to bypass the power supplies with quality capacitors.
Low equivalent series resistance (ESR) 1 μF to 10 μF tantalum
or electrolytic capacitors should be applied at the supplies to
minimize any transient disturbance and to filter low frequency
ripple. Figure 50 illustrates the basic supply bypassing
configuration for the AD5110/AD5112/AD5114.
VDD VLOGIC
VDD
+
GND
C1
0.1µF
C2
10µF
VLOGIC
+
C3
0.1µF
C4
10µF
AD5110/
AD5112/
AD5114
Figure 50. Power Supply Bypassing


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