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CMLDM8005 Datasheet(PDF) 2 Page - Central Semiconductor Corp |
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CMLDM8005 Datasheet(HTML) 2 Page - Central Semiconductor Corp |
2 / 2 page CMLDM8005 SURFACE MOUNT DUAL P-CHANNEL ENHANCEMENT-MODE SILICON MOSFETS SOT-563 CASE - MECHANICAL OUTLINE PIN CONFIGURATION LEAD CODE: 1) Source Q1 2) Gate Q1 3) Drain Q2 4) Source Q2 5) Gate Q2 6) Drain Q1 MARKING CODE: CC8 ELECTRICAL CHARACTERISTICS PER TRANSISTOR - Continued: (TA=25°C unless otherwise noted) SYMBOL TEST CONDITIONS MIN TYP UNITS Qg(tot) VDS=10V, VGS=4.5V, ID=200mA 1.2 nC Qgs VDS=10V, VGS=4.5V, ID=200mA 0.24 nC Qgd VDS=10V, VGS=4.5V, ID=200mA 0.36 nC gFS VDS=10V, ID=200mA 0.2 S Crss VDS=16V, VGS=0, f=1.0MHz 25 pF Ciss VDS=16V, VGS=0, f=1.0MHz 100 pF Coss VDS=16V, VGS=0, f=1.0MHz 21 pF ton VDD=10V, VGS=4.5V, ID=200mA, RG=10Ω 38 ns toff VDD=10V, VGS=4.5V, ID=200mA, RG=10Ω 48 ns www.centr a lsemi.com R3 (27-September 2011) |
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