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KSZ8873MLLJ Datasheet(PDF) 37 Page - Micrel Semiconductor

Part No. KSZ8873MLLJ
Description  Integrated 3-Port 10/100 Managed Switch with PHYs
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Maker  MICREL [Micrel Semiconductor]
Homepage  http://www.micrel.com
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KSZ8873MLLJ Datasheet(HTML) 37 Page - Micrel Semiconductor

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Micrel, Inc.
KSZ8873MLLJ
September 2011
37
M9999-091911-1.8
Figure 9. EEPROM Configuration Timing Diagram
The following is a sample procedure for programming the KSZ8873MLLJ with a pre-configured EEPROM:
1. Connect the KSZ8873MLLJ to the EEPROM by joining the SCL and SDA signals of the respective devices.
2. Enable I
2C master mode by setting the KSZ8873MLLJ strap-in pins, P2LED[1:0] to “00”.
3. Check to ensure that the KSZ8873MLLJ reset signal input, RSTN, is properly connected to the external reset source
at the board level.
4. Program the desired configuration data into the EEPROM.
5. Place the EEPROM on the board and power up the board.
6. Assert an active-low reset to the RSTN pin of the KSZ8873MLLJ. After reset is de-asserted, the KSZ8873MLLJ
begins reading the configuration data from the EEPROM. The KSZ8873MLLJ checks that the first byte read from the
EEPROM is “88”. If this value is correct, EEPROM configuration continues. If not, EEPROM configuration access is
denied and all other data sent from the EEPROM is ignored by the KSZ8873MLLJ.
Note:
For proper operation, check to ensure that the KSZ8873MLLJ PWRDN input signal is not asserted during the reset
operation. The PWRDN input is active low.
I2C Slave Serial Bus Configuration
In managed mode, the KSZ8873MLLJ can be configured as an I
2C slave device. In this mode, an I2C master device
(external controller/CPU) has complete programming access to the KSZ8873MLLJ’s 198 registers. Programming access
includes the Global Registers, Port Registers, Advanced Control Registers and indirect access to the “Static MAC Table”,
“VLAN Table”, “Dynamic MAC Table,” and “MIB Counters.” The tables and counters are indirectly accessed via registers
121 to 131.
In I
2C slave mode, the KSZ8873MLLJ operates like other I2C slave devices. Addressing the KSZ8873MLLJ’s 8-bit
registers is similar to addressing Atmel’s AT24C02 EEPROM’s memory locations. Details of I
2C read/write operations and
related timing information can be found in the AT24C02 Datasheet.
Two fixed 8-bit device addresses are used to address the KSZ8873MLLJ in I
2C slave mode. One is for read; the other is
for write. The addresses are as follow:
1011_1111 <read>
1011_1110 <write>
The following is a sample procedure for programming the KSZ8873MLLJ using the I
2C slave serial bus:
1. Enable I
2C slave mode by setting the KSZ8873MLLJ strap-in pins P2LED[1:0] to “01”.
2. Power up the board and assert reset to the KSZ8873MLLJ. Configure the desired register settings in the
KSZ8873MLLJ, using the I
2C write operation.
3. Read back and verify the register settings in the KSZ8873MLLJ, using the I
2C read operation.
Some of the configuration settings, such as “Aging enable”, “Auto Negotiation Enable”, “Force Speed” and “Power down”
can be programmed after the switch has been started.


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