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KSZ8873MLLJ Datasheet(PDF) 77 Page - Micrel Semiconductor |
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KSZ8873MLLJ Datasheet(HTML) 77 Page - Micrel Semiconductor |
77 / 108 page Micrel, Inc. KSZ8873MLLJ September 2011 77 M9999-091911-1.8 Register 176 (0xB0): TXQ Split for Q2 in Port 1 Bit Name R/W Description Default 7 Priority Select R/W 0 = enable straight priority with Reg 175/177/178 bits[7]=0 and Reg 5 bit[3]=0 for higher priority first 1= priority ratio is 8:4:2:1 for 4 queues and 2:1 for 2 queues with Reg 175/177/178 bits[7]=1. 1 6:0 Reserved RO Reserved Do not change the default values. 4 Register 177 (0xB1): TXQ Split for Q1 in Port 1 Bit Name R/W Description Default 7 Priority Select R/W 0 = enable straight priority with Reg 175/176/178 bits[7]=0 and Reg 5 bit[3]=0 for higher priority first 1= priority ratio is 8:4:2:1 for 4 queues and 2:1 for 2 queues with Reg 175/176/178 bits[7]=1. 1 6:0 Reserved RO Reserved Do not change the default values. 2 Register 178 (0xB2): TXQ Split for Q0 in Port 1 Bit Name R/W Description Default 7 Priority Select R/W 0 = enable straight priority with Reg 175/176/177 bits[7]=0 and Reg 5 bit[3]=0 for higher priority first 1= priority ratio is 8:4:2:1 for 4 queues and 2:1 for 2 queues with Reg 175/176/177 bits[7]=1. 1 6:0 Reserved RO Reserved Do not change the default values. 1 Register 179 (0xB3): TXQ Split for Q3 in Port 2 Bit Name R/W Description Default 7 Priority Select R/W 0 = enable straight priority with Reg 180/181/182 bits[7]=0 and Reg 5 bit[3]=0 for higher priority first 1= priority ratio is 8:4:2:1 for 4 queues and 2:1 for 2 queues with Reg 180/181/182 bits[7]=1. 1 6:0 Reserved RO Reserved Do not change the default values. 8 Register 180 (0xB4): TXQ Split for Q2 in Port 2 Bit Name R/W Description Default 7 Priority Select R/W 0 = enable straight priority with Reg 179/181/182 bits[7]=0 and Reg 5 bit[3]=0 for higher priority first 1= priority ratio is 8:4:2:1 for 4 queues and 2:1 for 2 queues with Reg 179/181/182 bits[7]=1. 1 6:0 Reserved RO Reserved Do not change the default values. 4 |
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