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KSZ8873MLLJ Datasheet(PDF) 49 Page - Micrel Semiconductor

Part No. KSZ8873MLLJ
Description  Integrated 3-Port 10/100 Managed Switch with PHYs
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Maker  MICREL [Micrel Semiconductor]
Homepage  http://www.micrel.com
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KSZ8873MLLJ Datasheet(HTML) 49 Page - Micrel Semiconductor

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Micrel, Inc.
KSZ8873MLLJ
September 2011
49
M9999-091911-1.8
Register Description
Global Registers (Registers 0 – 15)
Register 0 (0x00): Chip ID0
Bit
Name
R/W
Description
Default
7-0
Family ID
RO
Chip family
0x88
Register 1 (0x01): Chip ID1 / Start Switch
Bit
Name
R/W
Description
Default
7-4
Chip ID
RO
0x3 is assigned to M series. (73M)
0x3
3-1
Revision ID
RO
Revision ID
-
0
Start Switch
RW
=1, start the switch (default)
0=, stop the switch
1
Register 2 (0x02): Global Control 0
Bit
Name
R/W
Description
Default
7
New Back-off
Enable
R/W
New back-off algorithm designed for UNH
=1, Enable
=0, Disable
0
6
Rserved
RO
Rserved
0
5
Flush Dynamic
MAC Table
R/W
=1, Enable flush dynamic MAC table for spanning tree application
=0, Disable
0
4
Flush Static
MAC Table
R/W
=1, Enable flush static MAC table for spanning tree application
=0, Disable
0
3
Pass Flow
Control Packet
R/W
=1, Switch will pass 802.1x “flow control”
packets
=0, Switch will drop 802.1x “flow control” packets
0
2
Reserved
RO
Reserved
Do not change the default value.
0
1
Reserved
RO
Reserved
Do not change the default value.
0
0
Rserved
RO
Reserved
0


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