 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
KSZ8873MLLJ Datasheet(PDF) 48 Page - Micrel Semiconductor |
|
||||||||||||||||||||||||||||||
KSZ8873MLLJ Datasheet(HTML) 48 Page - Micrel Semiconductor |
|
|
48 / 108 page 
Micrel, Inc. KSZ8873MLLJ September 2011 48 M9999-091911-1.8 Memory Map (8-bit Registers) Global Registers Register (Decimal) Register (Hex) Description 0-1 0x00-0x01 Chip ID Registers 2-15 0x02-0x0F Global Control Registers Port Registers Register (Decimal) Register (Hex) Description 16-29 0x10-0x1D Port 1 Control Registers, including MII PHY Registers 30-31 0x1E-0x1F Port 1 Status Registers, including MII PHY Registers 32-45 0x20-0x2D Port 2 Control Registers, including MII PHY Registers 46-47 0x2E-0x2F Port 2 Status Registers, including MII PHY Registers 48-57 0x30-0x39 Port 3 Control Registers 58-62 0x3A-0x3E Reserved 63 0x3F Port 3 Status Register 64-95 0x40-0x5F Reserved Advanced Control Registers Register (Decimal) Register (Hex) Description 96-111 0x60-0x6F TOS Priority Control Registers 112-117 0x70-0x75 Switch Engine’s MAC Address Registers 118-120 0x76-0x78 User Defined Registers 121-122 0x79-0x7A Indirect Access Control Registers 123-131 0x7B-0x83 Indirect Data Registers 142-153 0x8E-0x99 Station Address 154-165 0x9A-0xA5 Egress data rate limit 166 0xA6 Device mode indicator 167-170 0xA7-0xAA High Priority Packet Buffer Reserved 171-174 0xAB-0xAE PM Usage Flow Control Select Mode 175-186 0xAF-0xBA TXQ Split 187-188 0xBB-0xBC Link Change Interrupt register 189 0xBD Force Pause Off Iteration Limit Enable 192 0xC0 Fiber Signal Threshold 194 0xC2 Insert SRC PVID 195 0xC3 Power Management and LED Mode 196 0xC4 Sleep Mode 198 0xC6 Forward Invalid VID Frame and Host Mode |
|
English ▼
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
