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KSZ8864RMNI Datasheet(PDF) 17 Page - Micrel Semiconductor

Part # KSZ8864RMNI
Description  Integrated 4-Port 10/100 Managed Switch with Two MACs MII or RMII Interfaces
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Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

KSZ8864RMNI Datasheet(HTML) 17 Page - Micrel Semiconductor

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Micrel, Inc.
KSZ8864RMN
September 2011
17
M9999-092011-1.4
Pin Number
Pin Name
Type
(1)
Port
Pin Function
(2)
50
P2LED0
IPU/O
2
LED indicator for Port 2.
Strap option: Switch MAC3 used only.
PU (default) = Select MII interface for the Switch MAC3 SW3-
MII.
PD = Select RMII interface for the Switch MAC3 SW3-RMII.
51
P1LED1
IPU/O
1
LED indicator for Port 1.
Strap option: Switch RMII used only.
PU (default) = Select the device as clock mode, when use
RMII interface, all clock source come from pin x1/x2 crystal
25MHz.
PD = Select the device as normal mode when use RMII
interface. All clock source comes from SW4-RMII SM4TXC pin
with an external input 50MHz clock. In the normal mode, the
25MHz crystal clock from pin X1/X2 doesn’t take affect and
should disable SW4-RMII SW4RXC 50MHz clock output by the
register 87.
The normal mode is used when SW4-RMII receive an external
50MHz RMII reference clock from pin SM4TXC.
52
P1LED0
IPU/O
1
LED indicator for Port 1.
Strap option: for Switch MAC4 only.
PU (default) = Select MII interface for the Switch MAC4 SW4-
MII.
PD = Select RMII interface for the Switch MAC4 SW4-RMII.
53
MDC
IPU
All
MII management interface clock. Or SMI interface clock
54
MDIO
IPU/O
All
MII management data I/O. Or SMI interface data I/O
Features internal pull down to define pin state when not driven.
Note: Need an external pull-up when driven.
55
SPIQ
IPU/O
All
SPI serial data output in SPI slave mode.
Note: Need an external pull-up when driven.
56
SPIC/SCL
IPU/O
All
(1) Input clock up to 25MHz in SPI slave mode,
(2) output clock at 61KHz in I
2C master mode.
Note: Need an external pull-up when driven.
57
SPID/SDA
IPU/O
All
(1) Serial data input in SPI slave mode;
(2) serial data input/output in I
2C master mode.
Note: Need an external pull-up when driven.
58
SPIS_N
IPU
All
Active low.
(1) SPI data transfer start in SPI slave mode. When SPIS_N is
high, the device is deselected and SPIQ is held in high
impedance state, a high-to-low transition to initiate the SPI data
transfer.
(2) Not used in I
2C master mode.


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