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74LVC1G00GS Datasheet(PDF) 4 Page - NXP Semiconductors |
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74LVC1G00GS Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 17 page 74LVC1G00 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 9 — 7 December 2011 4 of 17 NXP Semiconductors 74LVC1G00 Single 2-input NAND gate 8. Limiting values [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. [3] For TSSOP5 and SC-74A packages: above 87.5 C the value of P tot derates linearly with 4.0 mW/K. For XSON6 packages: above 118 C the value of P tot derates linearly with 7.8 mW/K. 9. Recommended operating conditions Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage 0.5 +6.5 V IIK input clamping current VI < 0 V 50 - mA VI input voltage [1] 0.5 +6.5 V IOK output clamping current VO > VCC or VO < 0 V - 50 mA VO output voltage Active mode [1][2] 0.5 VCC + 0.5 V Power-down mode [1][2] 0.5 +6.5 V IO output current VO = 0 V to VCC - 50 mA ICC supply current - +100 mA IGND ground current 100 - mA Ptot total power dissipation Tamb = 40 C to +125 C [3] - 250 mW Tstg storage temperature 65 +150 C Table 6. Recommended operating conditions Symbol Parameter Conditions Min Typ Max Unit VCC supply voltage 1.65 - 5.5 V VI input voltage 0 - 5.5 V VO output voltage Active mode 0 - VCC V VCC = 0 V; Power-down mode 0 - 5.5 V Tamb ambient temperature 40 - +125 C t/V input transition rise and fall rate VCC = 1.65 V to 2.7 V - - 20 ns/V VCC = 2.7 V to 5.5 V - - 10 ns/V |
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