Frequency Timing Generator for Peripherals

1664—05/14/10

9FGP205

Frequency Timing Generator for Peripherals

4

Advance Information

Drive Strength for all the single-ended outputs can be controlled by the SMBus Bytes 4 and 5 as shown in the Default Drive Strength Table.

Test Load

CL=5pF

Rs

Zo

ICS9FGP202A

SEPP Output Buffer

(Single Ended

Push Pull)

Rs

Zo

Rs

Zo

SEPP Output Buffer

(Single Ended

Push Pull)

CL=5pF

CL=5pF

L1

L2

NOTE: L1 must equal L2 +/- 25 mils

ICS9FGP205

Default Drive Strength Table

Default Drive

Optional Drive

RGMII

1 Load

NA

RMII

1 Load

2 Loads

33.33MHz

2 Loads

1 Load

25Mhz

2 Loads

1 Load

32.768KHz

2 Loads

1 Load

Series Termination Resistor Values EXCEPT RGMII

Output Drive

Strength

Series Resistor

(Rs) for driving 1

Load

Series Resistor

(Rs) for driving 2

Loads

1 Load

22 ohms

N/A

2 Loads

33 ohms

8.2 ohms

Note: All values are for Zo = 50Ω

Series Termination Resistor Values - RGMII

Output Drive

Strength

Series Resistor

(Rs) for driving 1

Load

Series Resistor

(Rs) for driving 2

Loads

1 Load

27 ohms

N/A

Note: All values are for Zo = 50Ω