DATA SHEET

IDT5V925BQGI REVISION B JANUARY 21, 2011

1

©2011 Integrated Device Technology, Inc.

Programmable LVCMOS/LVTTL

Clock Generator

IDT5V925BI

General Description

The IDT5V925BI is a high-performance, low skew, low jitter

phase-locked loop (PLL) clock driver. It provides precise phase and

frequency alignment of its clock outputs to an externally applied

clock input or internal crystal oscillator. The IDT5V925BI has been

specially designed to interface with Gigabit Ethernet and Fast

Ethernet applications by providing a 125MHz clock from 25MHz

input. It can also be programmed to provide output frequencies

ranging from 3.125MHz to 160MHz with input frequencies ranging

from 3.125MHz to 80MHz.

The IDT5V925BI includes an internal RC filter that provides

excellent jitter characteristics and eliminates the need for external

components. When using the optional crystal input, the chip accepts

a 10-30MHz fundamental mode crystal with a maximum equivalent

series resistance of 50

feedback resistor and crystal capacitors (nominal load capacitance

is 18pF).

Applications

Features

5, 6, 7 and 8)

Q/N

Q0

Q1

Q2

OPTIONAL

CRYSTAL

X1

X2

LOOP

FILTER

VCO

PHASE

DETECTOR

XTAL

OSC

FB

CLKIN

OE

S0

S1

SELECT

MODE

VCO

DIVIDE

1/N

0

1

IDT5V925BI

16 LEAD QSOP

0.194” x 0.236” x 0.058” package body

Q Package

Top View

Pin Assignment

Block Diagram

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

GNDQ

CLKIN

FB

GND

Q/N

GND

OE